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50788a3fdb
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net>
350 lines
11 KiB
C
350 lines
11 KiB
C
/*
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* TriCore emulation for qemu: fpu helper.
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*
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* Copyright (c) 2016 Bastian Koppelmann University of Paderborn
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/helper-proto.h"
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#define QUIET_NAN 0x7fc00000
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#define ADD_NAN 0x7fc00001
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#define DIV_NAN 0x7fc00008
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#define MUL_NAN 0x7fc00002
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#define FPU_FS PSW_USB_C
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#define FPU_FI PSW_USB_V
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#define FPU_FV PSW_USB_SV
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#define FPU_FZ PSW_USB_AV
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#define FPU_FU PSW_USB_SAV
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/* we don't care about input_denormal */
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static inline uint8_t f_get_excp_flags(CPUTriCoreState *env)
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{
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return get_float_exception_flags(&env->fp_status)
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& (float_flag_invalid
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| float_flag_overflow
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| float_flag_underflow
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| float_flag_output_denormal
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| float_flag_divbyzero
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| float_flag_inexact);
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}
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static inline bool f_is_denormal(float32 arg)
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{
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return float32_is_zero_or_denormal(arg) && !float32_is_zero(arg);
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}
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static inline float32 f_maddsub_nan_result(float32 arg1, float32 arg2,
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float32 arg3, float32 result,
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uint32_t muladd_negate_c)
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{
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uint32_t aSign, bSign, cSign;
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uint32_t aExp, bExp, cExp;
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if (float32_is_any_nan(arg1) || float32_is_any_nan(arg2) ||
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float32_is_any_nan(arg3)) {
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return QUIET_NAN;
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} else if (float32_is_infinity(arg1) && float32_is_zero(arg2)) {
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return MUL_NAN;
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} else if (float32_is_zero(arg1) && float32_is_infinity(arg2)) {
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return MUL_NAN;
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} else {
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aSign = arg1 >> 31;
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bSign = arg2 >> 31;
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cSign = arg3 >> 31;
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aExp = (arg1 >> 23) & 0xff;
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bExp = (arg2 >> 23) & 0xff;
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cExp = (arg3 >> 23) & 0xff;
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if (muladd_negate_c) {
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cSign ^= 1;
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}
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if (((aExp == 0xff) || (bExp == 0xff)) && (cExp == 0xff)) {
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if (aSign ^ bSign ^ cSign) {
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return ADD_NAN;
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}
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}
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}
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return result;
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}
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static void f_update_psw_flags(CPUTriCoreState *env, uint8_t flags)
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{
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uint8_t some_excp = 0;
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set_float_exception_flags(0, &env->fp_status);
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if (flags & float_flag_invalid) {
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env->FPU_FI = 1 << 31;
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some_excp = 1;
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}
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if (flags & float_flag_overflow) {
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env->FPU_FV = 1 << 31;
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some_excp = 1;
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}
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if (flags & float_flag_underflow || flags & float_flag_output_denormal) {
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env->FPU_FU = 1 << 31;
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some_excp = 1;
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}
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if (flags & float_flag_divbyzero) {
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env->FPU_FZ = 1 << 31;
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some_excp = 1;
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}
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if (flags & float_flag_inexact || flags & float_flag_output_denormal) {
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env->PSW |= 1 << 26;
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some_excp = 1;
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}
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env->FPU_FS = some_excp;
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}
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#define FADD_SUB(op) \
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uint32_t helper_f##op(CPUTriCoreState *env, uint32_t r1, uint32_t r2) \
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{ \
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float32 arg1 = make_float32(r1); \
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float32 arg2 = make_float32(r2); \
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uint32_t flags; \
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float32 f_result; \
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\
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f_result = float32_##op(arg2, arg1, &env->fp_status); \
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flags = f_get_excp_flags(env); \
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if (flags) { \
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/* If the output is a NaN, but the inputs aren't, \
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we return a unique value. */ \
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if ((flags & float_flag_invalid) \
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&& !float32_is_any_nan(arg1) \
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&& !float32_is_any_nan(arg2)) { \
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f_result = ADD_NAN; \
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} \
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f_update_psw_flags(env, flags); \
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} else { \
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env->FPU_FS = 0; \
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} \
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return (uint32_t)f_result; \
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}
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FADD_SUB(add)
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FADD_SUB(sub)
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uint32_t helper_fmul(CPUTriCoreState *env, uint32_t r1, uint32_t r2)
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{
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uint32_t flags;
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float32 arg1 = make_float32(r1);
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float32 arg2 = make_float32(r2);
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float32 f_result;
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f_result = float32_mul(arg1, arg2, &env->fp_status);
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flags = f_get_excp_flags(env);
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if (flags) {
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/* If the output is a NaN, but the inputs aren't,
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we return a unique value. */
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if ((flags & float_flag_invalid)
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&& !float32_is_any_nan(arg1)
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&& !float32_is_any_nan(arg2)) {
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f_result = MUL_NAN;
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}
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f_update_psw_flags(env, flags);
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} else {
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env->FPU_FS = 0;
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}
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return (uint32_t)f_result;
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}
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uint32_t helper_fdiv(CPUTriCoreState *env, uint32_t r1, uint32_t r2)
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{
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uint32_t flags;
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float32 arg1 = make_float32(r1);
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float32 arg2 = make_float32(r2);
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float32 f_result;
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f_result = float32_div(arg1, arg2 , &env->fp_status);
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flags = f_get_excp_flags(env);
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if (flags) {
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/* If the output is a NaN, but the inputs aren't,
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we return a unique value. */
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if ((flags & float_flag_invalid)
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&& !float32_is_any_nan(arg1)
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&& !float32_is_any_nan(arg2)) {
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f_result = DIV_NAN;
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}
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f_update_psw_flags(env, flags);
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} else {
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env->FPU_FS = 0;
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}
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return (uint32_t)f_result;
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}
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uint32_t helper_fmadd(CPUTriCoreState *env, uint32_t r1,
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uint32_t r2, uint32_t r3)
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{
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uint32_t flags;
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float32 arg1 = make_float32(r1);
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float32 arg2 = make_float32(r2);
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float32 arg3 = make_float32(r3);
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float32 f_result;
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f_result = float32_muladd(arg1, arg2, arg3, 0, &env->fp_status);
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flags = f_get_excp_flags(env);
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if (flags) {
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if (flags & float_flag_invalid) {
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arg1 = float32_squash_input_denormal(arg1, &env->fp_status);
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arg2 = float32_squash_input_denormal(arg2, &env->fp_status);
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arg3 = float32_squash_input_denormal(arg3, &env->fp_status);
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f_result = f_maddsub_nan_result(arg1, arg2, arg3, f_result, 0);
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}
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f_update_psw_flags(env, flags);
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} else {
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env->FPU_FS = 0;
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}
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return (uint32_t)f_result;
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}
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uint32_t helper_fmsub(CPUTriCoreState *env, uint32_t r1,
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uint32_t r2, uint32_t r3)
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{
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uint32_t flags;
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float32 arg1 = make_float32(r1);
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float32 arg2 = make_float32(r2);
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float32 arg3 = make_float32(r3);
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float32 f_result;
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f_result = float32_muladd(arg1, arg2, arg3, float_muladd_negate_product,
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&env->fp_status);
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flags = f_get_excp_flags(env);
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if (flags) {
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if (flags & float_flag_invalid) {
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arg1 = float32_squash_input_denormal(arg1, &env->fp_status);
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arg2 = float32_squash_input_denormal(arg2, &env->fp_status);
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arg3 = float32_squash_input_denormal(arg3, &env->fp_status);
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f_result = f_maddsub_nan_result(arg1, arg2, arg3, f_result, 1);
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}
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f_update_psw_flags(env, flags);
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} else {
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env->FPU_FS = 0;
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}
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return (uint32_t)f_result;
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}
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uint32_t helper_fcmp(CPUTriCoreState *env, uint32_t r1, uint32_t r2)
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{
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uint32_t result, flags;
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float32 arg1 = make_float32(r1);
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float32 arg2 = make_float32(r2);
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set_flush_inputs_to_zero(0, &env->fp_status);
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result = 1 << (float32_compare_quiet(arg1, arg2, &env->fp_status) + 1);
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result |= f_is_denormal(arg1) << 4;
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result |= f_is_denormal(arg2) << 5;
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flags = f_get_excp_flags(env);
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if (flags) {
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f_update_psw_flags(env, flags);
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} else {
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env->FPU_FS = 0;
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}
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set_flush_inputs_to_zero(1, &env->fp_status);
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return result;
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}
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uint32_t helper_ftoi(CPUTriCoreState *env, uint32_t arg)
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{
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float32 f_arg = make_float32(arg);
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int32_t result, flags;
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result = float32_to_int32(f_arg, &env->fp_status);
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flags = f_get_excp_flags(env);
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if (flags) {
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if (float32_is_any_nan(f_arg)) {
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result = 0;
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}
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f_update_psw_flags(env, flags);
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} else {
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env->FPU_FS = 0;
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}
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return (uint32_t)result;
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}
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uint32_t helper_itof(CPUTriCoreState *env, uint32_t arg)
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{
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float32 f_result;
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uint32_t flags;
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f_result = int32_to_float32(arg, &env->fp_status);
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flags = f_get_excp_flags(env);
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if (flags) {
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f_update_psw_flags(env, flags);
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} else {
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env->FPU_FS = 0;
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}
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return (uint32_t)f_result;
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}
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uint32_t helper_ftouz(CPUTriCoreState *env, uint32_t arg)
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{
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float32 f_arg = make_float32(arg);
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uint32_t result;
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int32_t flags;
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result = float32_to_uint32_round_to_zero(f_arg, &env->fp_status);
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flags = f_get_excp_flags(env);
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if (flags & float_flag_invalid) {
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flags &= ~float_flag_inexact;
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if (float32_is_any_nan(f_arg)) {
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result = 0;
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}
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} else if (float32_lt_quiet(f_arg, 0, &env->fp_status)) {
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flags = float_flag_invalid;
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result = 0;
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}
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if (flags) {
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f_update_psw_flags(env, flags);
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} else {
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env->FPU_FS = 0;
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}
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return result;
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}
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void helper_updfl(CPUTriCoreState *env, uint32_t arg)
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{
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env->FPU_FS = extract32(arg, 7, 1) & extract32(arg, 15, 1);
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env->FPU_FI = (extract32(arg, 6, 1) & extract32(arg, 14, 1)) << 31;
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env->FPU_FV = (extract32(arg, 5, 1) & extract32(arg, 13, 1)) << 31;
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env->FPU_FZ = (extract32(arg, 4, 1) & extract32(arg, 12, 1)) << 31;
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env->FPU_FU = (extract32(arg, 3, 1) & extract32(arg, 11, 1)) << 31;
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/* clear FX and RM */
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env->PSW &= ~(extract32(arg, 10, 1) << 26);
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env->PSW |= (extract32(arg, 2, 1) & extract32(arg, 10, 1)) << 26;
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fpu_set_state(env);
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}
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