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The NVIC provides an outbound qemu_irq "SYSRESETREQ" which it signals when the guest sets the SYSRESETREQ bit in the AIRCR register. This matches the hardware design (where the CPU has a signal of this name and it is up to the SoC to connect that up to an actual reset mechanism), but in QEMU it mostly results in duplicated code in SoC objects and bugs where SoC model implementors forget to wire up the SYSRESETREQ line. Provide a default behaviour for the case where SYSRESETREQ is not actually connected to anything: use qemu_system_reset_request() to perform a system reset. This will allow us to remove the implementations of SYSRESETREQ handling from the boards where that's exactly what it does, and also fixes the bugs in the board models which forgot to wire up the signal: * microbit * mps2-an385 * mps2-an505 * mps2-an511 * mps2-an521 * musca-a * musca-b1 * netduino * netduinoplus2 We still allow the board to wire up the signal if it needs to, in case we need to model more complicated reset controller logic or to model buggy SoC hardware which forgot to wire up the line itself. But defaulting to "reset the system" is more often going to be correct than defaulting to "do nothing". Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200728103744.6909-3-peter.maydell@linaro.org |
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allwinner-a10.h | ||
allwinner-h3.h | ||
armsse.h | ||
armv7m.h | ||
aspeed_soc.h | ||
aspeed.h | ||
bcm2835_peripherals.h | ||
bcm2836.h | ||
boot.h | ||
digic.h | ||
exynos4210.h | ||
fdt.h | ||
fsl-imx6.h | ||
fsl-imx6ul.h | ||
fsl-imx7.h | ||
fsl-imx25.h | ||
fsl-imx31.h | ||
linux-boot-if.h | ||
msf2-soc.h | ||
nrf51_soc.h | ||
nrf51.h | ||
omap.h | ||
primecell.h | ||
pxa.h | ||
raspi_platform.h | ||
sharpsl.h | ||
smmu-common.h | ||
smmuv3.h | ||
soc_dma.h | ||
stm32f205_soc.h | ||
stm32f405_soc.h | ||
sysbus-fdt.h | ||
virt.h | ||
xlnx-versal.h | ||
xlnx-zynqmp.h |