Cédric Le Goater 5258c2a69c aspeed/smc: Inject errors in DMA checksum ... Emulate read errors in the DMA Checksum Register for high frequencies and optimistic settings of the Read Timing Compensation Register. This will help in tuning the SPI timing calibration algorithm. Errors are only injected when the property "inject_failure" is set to true as suggested by Philippe. The values below are those to expect from the first flash device of the FMC controller of a palmetto-bmc machine. Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-id: 20190904070506.1052-8-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2019-09-13 16:05:01 +01:00
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aspeed_smc.h	aspeed/smc: Inject errors in DMA checksum	2019-09-13 16:05:01 +01:00
imx_spi.h	i.MX: Add the Freescale SPI Controller	2016-05-12 13:22:29 +01:00
mss-spi.h	msf2: Add Smartfusion2 SPI controller	2017-09-21 16:36:56 +01:00
pl022.h	hw/ssi/pl022: Allow use as embedded-struct device	2018-08-24 13:17:44 +01:00
ssi.h	Include hw/qdev-properties.h less	2019-08-16 13:31:53 +02:00
stm32f2xx_spi.h	Include hw/hw.h exactly where needed	2019-08-16 13:31:52 +02:00
xilinx_spips.h	include: Make headers more self-contained	2019-08-16 13:31:51 +02:00