Richard Henderson f1be36969d cputlb: Move TLB_RECHECK handling into load/store_helper ... Having this in io_readx/io_writex meant that we forgot to re-compute index after tlb_fill. It also means we can use the normal aligned memory load path. It also fixes a bug in that we had cached a use of index across a tlb_fill. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>		2019-05-10 20:23:21 +01:00
..
kvm	qom/cpu: Simplify how CPUClass:cpu_dump_state() prints	2019-04-18 22:18:59 +02:00
stubs	tcg: simplify !CONFIG_TCG handling of tb_invalidate_*	2018-07-02 15:41:18 +02:00
tcg	cputlb: Move TLB_RECHECK handling into load/store_helper	2019-05-10 20:23:21 +01:00
accel.c	accel: Remove unused AccelClass::available field	2019-05-02 16:56:33 +02:00
Makefile.objs	qtest: Don't compile qtest accel on non-POSIX systems	2019-05-02 16:56:33 +02:00
qtest.c	qtest: Don't compile qtest accel on non-POSIX systems	2019-05-02 16:56:33 +02:00