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Generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]') Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-12-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-13-ehabkost@redhat.com> Message-Id: <20200831210740.126168-14-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
171 lines
4.7 KiB
C
171 lines
4.7 KiB
C
/*
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* QEMU Intel 82374 emulation (Enhanced DMA controller)
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*
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* Copyright (c) 2010 Hervé Poussineau
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qemu/module.h"
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#include "hw/isa/isa.h"
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#include "hw/qdev-properties.h"
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#include "migration/vmstate.h"
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#include "hw/dma/i8257.h"
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#include "qom/object.h"
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#define TYPE_I82374 "i82374"
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typedef struct I82374State I82374State;
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DECLARE_INSTANCE_CHECKER(I82374State, I82374,
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TYPE_I82374)
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//#define DEBUG_I82374
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#ifdef DEBUG_I82374
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#define DPRINTF(fmt, ...) \
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do { fprintf(stderr, "i82374: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define DPRINTF(fmt, ...) \
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do {} while (0)
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#endif
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#define BADF(fmt, ...) \
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do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0)
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struct I82374State {
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ISADevice parent_obj;
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uint32_t iobase;
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uint8_t commands[8];
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PortioList port_list;
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};
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static const VMStateDescription vmstate_i82374 = {
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.name = "i82374",
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.version_id = 0,
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.minimum_version_id = 0,
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.fields = (VMStateField[]) {
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VMSTATE_UINT8_ARRAY(commands, I82374State, 8),
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VMSTATE_END_OF_LIST()
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},
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};
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static uint32_t i82374_read_isr(void *opaque, uint32_t nport)
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{
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uint32_t val = 0;
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BADF("%s: %08x\n", __func__, nport);
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DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
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return val;
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}
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static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data)
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{
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DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
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if (data != 0x42) {
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/* Not Stop S/G command */
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BADF("%s: %08x=%08x\n", __func__, nport, data);
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}
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}
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static uint32_t i82374_read_status(void *opaque, uint32_t nport)
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{
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uint32_t val = 0;
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BADF("%s: %08x\n", __func__, nport);
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DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
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return val;
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}
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static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t data)
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{
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DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
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BADF("%s: %08x=%08x\n", __func__, nport, data);
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}
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static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport)
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{
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uint32_t val = 0;
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BADF("%s: %08x\n", __func__, nport);
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DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
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return val;
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}
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static const MemoryRegionPortio i82374_portio_list[] = {
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{ 0x0A, 1, 1, .read = i82374_read_isr, },
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{ 0x10, 8, 1, .write = i82374_write_command, },
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{ 0x18, 8, 1, .read = i82374_read_status, },
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{ 0x20, 0x20, 1,
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.write = i82374_write_descriptor, .read = i82374_read_descriptor, },
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PORTIO_END_OF_LIST(),
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};
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static void i82374_realize(DeviceState *dev, Error **errp)
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{
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I82374State *s = I82374(dev);
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ISABus *isa_bus = isa_bus_from_device(ISA_DEVICE(dev));
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if (isa_get_dma(isa_bus, 0)) {
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error_setg(errp, "DMA already initialized on ISA bus");
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return;
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}
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i8257_dma_init(isa_bus, true);
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portio_list_init(&s->port_list, OBJECT(s), i82374_portio_list, s,
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"i82374");
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portio_list_add(&s->port_list, isa_address_space_io(&s->parent_obj),
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s->iobase);
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memset(s->commands, 0, sizeof(s->commands));
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}
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static Property i82374_properties[] = {
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DEFINE_PROP_UINT32("iobase", I82374State, iobase, 0x400),
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DEFINE_PROP_END_OF_LIST()
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};
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static void i82374_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = i82374_realize;
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dc->vmsd = &vmstate_i82374;
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device_class_set_props(dc, i82374_properties);
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}
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static const TypeInfo i82374_info = {
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.name = TYPE_I82374,
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.parent = TYPE_ISA_DEVICE,
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.instance_size = sizeof(I82374State),
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.class_init = i82374_class_init,
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};
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static void i82374_register_types(void)
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{
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type_register_static(&i82374_info);
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}
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type_init(i82374_register_types)
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