qemu/hw
Peter Maydell f00f57f344 This PR includes multiple fixes and features for RISC-V:
- Fixes a bug in printing trap causes
  - Allows 16-bit writes to the SiFive test device. This fixes the
    failure to reboot the RISC-V virt machine
  - Support for the Microchip PolarFire SoC and Icicle Kit
  - A reafactor of RISC-V code out of hw/riscv
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCAAdFiEE9sSsRtSTSGjTuM6PIeENKd+XcFQFAl9aa4YACgkQIeENKd+X
 cFTJjgf5ASfFIO5HqP1l80/UM5Pswyq0IROZDq0ItZa6U4EPzLXoE2N0POriIj4h
 Ds2JbMg0ORDqY0VbSxHlgYHMgJ9S6cuVOMnATsPG0d2jaJ3gSxLBu5k/1ENqe+Vw
 sSYXZv5uEAUfOFz99zbuhKHct5HzlmBFW9dVHdflUQS+cRgsSXq27mz1BvZ8xMWl
 lMhwubqdoNx0rOD3vKnlwrxaf54DcJ2IQT3BtTCjEar3tukdNaLijAuwt2hrFyr+
 IwpeFXA/NWar+mXP3M+BvcLaI33j73/ac2+S5SJuzHGp/ot5nT5gAuq3PDEjHMeS
 t6z9Exp776VXxNE2iUA5NB65Yp3/6w==
 =07oA
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200910' into staging

This PR includes multiple fixes and features for RISC-V:
 - Fixes a bug in printing trap causes
 - Allows 16-bit writes to the SiFive test device. This fixes the
   failure to reboot the RISC-V virt machine
 - Support for the Microchip PolarFire SoC and Icicle Kit
 - A reafactor of RISC-V code out of hw/riscv

# gpg: Signature made Thu 10 Sep 2020 19:08:06 BST
# gpg:                using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054
# gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full]
# Primary key fingerprint: F6C4 AC46 D493 4868 D3B8  CE8F 21E1 0D29 DF97 7054

* remotes/alistair/tags/pull-riscv-to-apply-20200910: (30 commits)
  hw/riscv: Sort the Kconfig options in alphabetical order
  hw/riscv: Drop CONFIG_SIFIVE
  hw/riscv: Always build riscv_hart.c
  hw/riscv: Move sifive_test model to hw/misc
  hw/riscv: Move sifive_uart model to hw/char
  hw/riscv: Move riscv_htif model to hw/char
  hw/riscv: Move sifive_plic model to hw/intc
  hw/riscv: Move sifive_clint model to hw/intc
  hw/riscv: Move sifive_gpio model to hw/gpio
  hw/riscv: Move sifive_u_otp model to hw/misc
  hw/riscv: Move sifive_u_prci model to hw/misc
  hw/riscv: Move sifive_e_prci model to hw/misc
  hw/riscv: sifive_u: Connect a DMA controller
  hw/riscv: clint: Avoid using hard-coded timebase frequency
  hw/riscv: microchip_pfsoc: Hook GPIO controllers
  hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs
  hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23
  hw/net: cadence_gem: Add a new 'phy-addr' property
  hw/riscv: microchip_pfsoc: Connect a DMA controller
  hw/dma: Add SiFive platform DMA controller emulation
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

# Conflicts:
#	hw/riscv/trace-events
2020-09-13 20:29:35 +01:00
..
9pfs Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
acpi trivial patches pull request 20200911 2020-09-12 14:23:15 +01:00
adc meson: convert hw/adc 2020-08-21 06:30:32 -04:00
alpha Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
arm This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
audio Use OBJECT_DECLARE_TYPE where possible 2020-09-09 09:27:11 -04:00
avr Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
block QOM boilerplate cleanup 2020-09-11 19:26:51 +01:00
char This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
core Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
cpu Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
cris meson: convert hw/arch* 2020-08-21 06:30:33 -04:00
display QOM boilerplate cleanup 2020-09-11 19:26:51 +01:00
dma This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
gpio This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
hppa Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
hyperv trivial patches pull request 20200911 2020-09-12 14:23:15 +01:00
i2c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
i386 Various misc and testing fixes: 2020-09-12 22:54:32 +01:00
ide ahci: Rename ICH_AHCI to ICH9_AHCI 2020-09-09 13:20:22 -04:00
input Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
intc This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
ipack Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
ipmi Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
isa trivial patches pull request 20200911 2020-09-12 14:23:15 +01:00
lm32 hw/sd/milkymist: Do not create SD card within the SD host controller 2020-08-21 16:22:43 +02:00
m68k esp: Rename ESP_STATE to ESP 2020-09-09 13:20:22 -04:00
mem meson: convert hw/mem 2020-08-21 06:30:26 -04:00
microblaze Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
mips trivial patches pull request 20200911 2020-09-12 14:23:15 +01:00
misc This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
moxie meson: convert hw/arch* 2020-08-21 06:30:33 -04:00
net This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
nios2 meson: convert hw/arch* 2020-08-21 06:30:33 -04:00
nubus meson: convert hw/nubus 2020-08-21 06:30:25 -04:00
nvram Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
openrisc meson: convert hw/arch* 2020-08-21 06:30:33 -04:00
pci meson: convert hw/pci 2020-08-21 06:30:28 -04:00
pci-bridge Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
pci-host sabre: Rename SABRE_DEVICE to SABRE 2020-09-09 13:20:22 -04:00
pcmcia pxa2xx: Move QOM macros to header 2020-08-27 14:04:55 -04:00
ppc QOM boilerplate cleanup 2020-09-11 19:26:51 +01:00
rdma Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
riscv hw/riscv: Sort the Kconfig options in alphabetical order 2020-09-09 15:54:19 -07:00
rtc QOM boilerplate cleanup 2020-09-11 19:26:51 +01:00
rx Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
s390x ap-device: Rename AP_DEVICE_TYPE to TYPE_AP_DEVICE 2020-09-09 13:20:22 -04:00
scsi esp: Rename ESP_STATE to ESP 2020-09-09 13:20:22 -04:00
sd This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
semihosting meson: convert hw/semihosting 2020-08-21 06:30:25 -04:00
sh4 Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
smbios hw/smbios: add options for type 4 max-speed and current-speed 2020-08-27 08:29:13 -04:00
sparc esp: Rename ESP_STATE to ESP 2020-09-09 13:20:22 -04:00
sparc64 sabre: Rename SABRE_DEVICE to SABRE 2020-09-09 13:20:22 -04:00
ssi Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
timer QOM boilerplate cleanup 2020-09-11 19:26:51 +01:00
tpm QOM boilerplate cleanup 2020-09-11 19:26:51 +01:00
tricore meson: convert hw/arch* 2020-08-21 06:30:33 -04:00
unicore32 meson: convert hw/arch* 2020-08-21 06:30:33 -04:00
usb Various misc and testing fixes: 2020-09-12 22:54:32 +01:00
vfio QOM boilerplate cleanup 2020-09-11 19:26:51 +01:00
virtio QOM boilerplate cleanup 2020-09-11 19:26:51 +01:00
watchdog Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
xen Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
xenpv meson: convert hw/arch* 2020-08-21 06:30:33 -04:00
xtensa target/xtensa: implement NMI support 2020-08-21 12:48:14 -07:00
Kconfig hw/avr: Add limited support for some Arduino boards 2020-07-11 11:02:05 +02:00
meson.build meson: convert hw/arch* 2020-08-21 06:30:33 -04:00