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This patch implements the necessary infrastructure and hypercalls for sPAPR's TCE (Translation Control Entry) IOMMU mechanism. This is necessary for all virtual IO devices which do DMA (i.e. nearly all of them). Signed-off-by: Ben Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
90 lines
3.2 KiB
C
90 lines
3.2 KiB
C
#ifndef _HW_SPAPR_VIO_H
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#define _HW_SPAPR_VIO_H
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/*
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* QEMU sPAPR VIO bus definitions
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*
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* Copyright (c) 2010 David Gibson, IBM Corporation <david@gibson.dropbear.id.au>
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* Based on the s390 virtio bus definitions:
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* Copyright (c) 2009 Alexander Graf <agraf@suse.de>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#define SPAPR_VIO_TCE_PAGE_SHIFT 12
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#define SPAPR_VIO_TCE_PAGE_SIZE (1ULL << SPAPR_VIO_TCE_PAGE_SHIFT)
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#define SPAPR_VIO_TCE_PAGE_MASK (SPAPR_VIO_TCE_PAGE_SIZE - 1)
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enum VIOsPAPR_TCEAccess {
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SPAPR_TCE_FAULT = 0,
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SPAPR_TCE_RO = 1,
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SPAPR_TCE_WO = 2,
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SPAPR_TCE_RW = 3,
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};
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typedef struct VIOsPAPR_RTCE {
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uint64_t tce;
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} VIOsPAPR_RTCE;
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typedef struct VIOsPAPRDevice {
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DeviceState qdev;
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uint32_t reg;
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qemu_irq qirq;
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uint32_t vio_irq_num;
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target_ulong signal_state;
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uint32_t rtce_window_size;
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VIOsPAPR_RTCE *rtce_table;
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} VIOsPAPRDevice;
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typedef struct VIOsPAPRBus {
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BusState bus;
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} VIOsPAPRBus;
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typedef struct {
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DeviceInfo qdev;
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const char *dt_name, *dt_type, *dt_compatible;
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target_ulong signal_mask;
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int (*init)(VIOsPAPRDevice *dev);
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void (*hcalls)(VIOsPAPRBus *bus);
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int (*devnode)(VIOsPAPRDevice *dev, void *fdt, int node_off);
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} VIOsPAPRDeviceInfo;
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extern VIOsPAPRBus *spapr_vio_bus_init(void);
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extern VIOsPAPRDevice *spapr_vio_find_by_reg(VIOsPAPRBus *bus, uint32_t reg);
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extern void spapr_vio_bus_register_withprop(VIOsPAPRDeviceInfo *info);
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extern int spapr_populate_vdevice(VIOsPAPRBus *bus, void *fdt);
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extern int spapr_vio_signal(VIOsPAPRDevice *dev, target_ulong mode);
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int spapr_vio_check_tces(VIOsPAPRDevice *dev, target_ulong ioba,
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target_ulong len,
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enum VIOsPAPR_TCEAccess access);
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int spapr_tce_dma_read(VIOsPAPRDevice *dev, uint64_t taddr,
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void *buf, uint32_t size);
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int spapr_tce_dma_write(VIOsPAPRDevice *dev, uint64_t taddr,
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const void *buf, uint32_t size);
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int spapr_tce_dma_zero(VIOsPAPRDevice *dev, uint64_t taddr, uint32_t size);
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void stb_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint8_t val);
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void sth_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint16_t val);
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void stw_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint32_t val);
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void stq_tce(VIOsPAPRDevice *dev, uint64_t taddr, uint64_t val);
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uint64_t ldq_tce(VIOsPAPRDevice *dev, uint64_t taddr);
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void vty_putchars(VIOsPAPRDevice *sdev, uint8_t *buf, int len);
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void spapr_vty_create(VIOsPAPRBus *bus,
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uint32_t reg, CharDriverState *chardev,
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qemu_irq qirq, uint32_t vio_irq_num);
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#endif /* _HW_SPAPR_VIO_H */
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