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2e2f4ade86
Make floating point and VIS ops take a parameter for CPUState instead of relying on global env. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
407 lines
13 KiB
C
407 lines
13 KiB
C
/*
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* VIS op helpers
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "cpu.h"
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#include "helper.h"
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#define DT0 (env->dt0)
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#define DT1 (env->dt1)
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#define QT0 (env->qt0)
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#define QT1 (env->qt1)
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/* This function uses non-native bit order */
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#define GET_FIELD(X, FROM, TO) \
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((X) >> (63 - (TO)) & ((1ULL << ((TO) - (FROM) + 1)) - 1))
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/* This function uses the order in the manuals, i.e. bit 0 is 2^0 */
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#define GET_FIELD_SP(X, FROM, TO) \
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GET_FIELD(X, 63 - (TO), 63 - (FROM))
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target_ulong helper_array8(CPUState *env, target_ulong pixel_addr,
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target_ulong cubesize)
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{
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return (GET_FIELD_SP(pixel_addr, 60, 63) << (17 + 2 * cubesize)) |
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(GET_FIELD_SP(pixel_addr, 39, 39 + cubesize - 1) << (17 + cubesize)) |
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(GET_FIELD_SP(pixel_addr, 17 + cubesize - 1, 17) << 17) |
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(GET_FIELD_SP(pixel_addr, 56, 59) << 13) |
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(GET_FIELD_SP(pixel_addr, 35, 38) << 9) |
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(GET_FIELD_SP(pixel_addr, 13, 16) << 5) |
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(((pixel_addr >> 55) & 1) << 4) |
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(GET_FIELD_SP(pixel_addr, 33, 34) << 2) |
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GET_FIELD_SP(pixel_addr, 11, 12);
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}
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target_ulong helper_alignaddr(CPUState *env, target_ulong addr,
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target_ulong offset)
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{
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uint64_t tmp;
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tmp = addr + offset;
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env->gsr &= ~7ULL;
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env->gsr |= tmp & 7ULL;
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return tmp & ~7ULL;
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}
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void helper_faligndata(CPUState *env)
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{
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uint64_t tmp;
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tmp = (*((uint64_t *)&DT0)) << ((env->gsr & 7) * 8);
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/* on many architectures a shift of 64 does nothing */
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if ((env->gsr & 7) != 0) {
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tmp |= (*((uint64_t *)&DT1)) >> (64 - (env->gsr & 7) * 8);
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}
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*((uint64_t *)&DT0) = tmp;
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}
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#ifdef HOST_WORDS_BIGENDIAN
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#define VIS_B64(n) b[7 - (n)]
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#define VIS_W64(n) w[3 - (n)]
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#define VIS_SW64(n) sw[3 - (n)]
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#define VIS_L64(n) l[1 - (n)]
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#define VIS_B32(n) b[3 - (n)]
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#define VIS_W32(n) w[1 - (n)]
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#else
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#define VIS_B64(n) b[n]
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#define VIS_W64(n) w[n]
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#define VIS_SW64(n) sw[n]
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#define VIS_L64(n) l[n]
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#define VIS_B32(n) b[n]
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#define VIS_W32(n) w[n]
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#endif
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typedef union {
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uint8_t b[8];
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uint16_t w[4];
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int16_t sw[4];
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uint32_t l[2];
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uint64_t ll;
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float64 d;
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} VIS64;
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typedef union {
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uint8_t b[4];
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uint16_t w[2];
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uint32_t l;
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float32 f;
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} VIS32;
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void helper_fpmerge(CPUState *env)
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{
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VIS64 s, d;
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s.d = DT0;
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d.d = DT1;
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/* Reverse calculation order to handle overlap */
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d.VIS_B64(7) = s.VIS_B64(3);
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d.VIS_B64(6) = d.VIS_B64(3);
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d.VIS_B64(5) = s.VIS_B64(2);
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d.VIS_B64(4) = d.VIS_B64(2);
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d.VIS_B64(3) = s.VIS_B64(1);
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d.VIS_B64(2) = d.VIS_B64(1);
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d.VIS_B64(1) = s.VIS_B64(0);
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/* d.VIS_B64(0) = d.VIS_B64(0); */
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DT0 = d.d;
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}
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void helper_fmul8x16(CPUState *env)
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{
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VIS64 s, d;
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uint32_t tmp;
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s.d = DT0;
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d.d = DT1;
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#define PMUL(r) \
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tmp = (int32_t)d.VIS_SW64(r) * (int32_t)s.VIS_B64(r); \
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if ((tmp & 0xff) > 0x7f) { \
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tmp += 0x100; \
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} \
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d.VIS_W64(r) = tmp >> 8;
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PMUL(0);
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PMUL(1);
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PMUL(2);
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PMUL(3);
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#undef PMUL
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DT0 = d.d;
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}
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void helper_fmul8x16al(CPUState *env)
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{
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VIS64 s, d;
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uint32_t tmp;
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s.d = DT0;
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d.d = DT1;
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#define PMUL(r) \
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tmp = (int32_t)d.VIS_SW64(1) * (int32_t)s.VIS_B64(r); \
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if ((tmp & 0xff) > 0x7f) { \
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tmp += 0x100; \
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} \
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d.VIS_W64(r) = tmp >> 8;
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PMUL(0);
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PMUL(1);
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PMUL(2);
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PMUL(3);
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#undef PMUL
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DT0 = d.d;
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}
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void helper_fmul8x16au(CPUState *env)
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{
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VIS64 s, d;
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uint32_t tmp;
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s.d = DT0;
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d.d = DT1;
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#define PMUL(r) \
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tmp = (int32_t)d.VIS_SW64(0) * (int32_t)s.VIS_B64(r); \
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if ((tmp & 0xff) > 0x7f) { \
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tmp += 0x100; \
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} \
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d.VIS_W64(r) = tmp >> 8;
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PMUL(0);
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PMUL(1);
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PMUL(2);
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PMUL(3);
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#undef PMUL
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DT0 = d.d;
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}
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void helper_fmul8sux16(CPUState *env)
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{
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VIS64 s, d;
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uint32_t tmp;
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s.d = DT0;
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d.d = DT1;
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#define PMUL(r) \
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tmp = (int32_t)d.VIS_SW64(r) * ((int32_t)s.VIS_SW64(r) >> 8); \
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if ((tmp & 0xff) > 0x7f) { \
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tmp += 0x100; \
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} \
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d.VIS_W64(r) = tmp >> 8;
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PMUL(0);
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PMUL(1);
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PMUL(2);
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PMUL(3);
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#undef PMUL
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DT0 = d.d;
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}
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void helper_fmul8ulx16(CPUState *env)
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{
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VIS64 s, d;
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uint32_t tmp;
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s.d = DT0;
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d.d = DT1;
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#define PMUL(r) \
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tmp = (int32_t)d.VIS_SW64(r) * ((uint32_t)s.VIS_B64(r * 2)); \
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if ((tmp & 0xff) > 0x7f) { \
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tmp += 0x100; \
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} \
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d.VIS_W64(r) = tmp >> 8;
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PMUL(0);
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PMUL(1);
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PMUL(2);
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PMUL(3);
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#undef PMUL
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DT0 = d.d;
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}
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void helper_fmuld8sux16(CPUState *env)
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{
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VIS64 s, d;
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uint32_t tmp;
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s.d = DT0;
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d.d = DT1;
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#define PMUL(r) \
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tmp = (int32_t)d.VIS_SW64(r) * ((int32_t)s.VIS_SW64(r) >> 8); \
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if ((tmp & 0xff) > 0x7f) { \
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tmp += 0x100; \
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} \
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d.VIS_L64(r) = tmp;
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/* Reverse calculation order to handle overlap */
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PMUL(1);
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PMUL(0);
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#undef PMUL
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DT0 = d.d;
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}
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void helper_fmuld8ulx16(CPUState *env)
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{
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VIS64 s, d;
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uint32_t tmp;
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s.d = DT0;
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d.d = DT1;
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#define PMUL(r) \
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tmp = (int32_t)d.VIS_SW64(r) * ((uint32_t)s.VIS_B64(r * 2)); \
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if ((tmp & 0xff) > 0x7f) { \
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tmp += 0x100; \
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} \
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d.VIS_L64(r) = tmp;
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/* Reverse calculation order to handle overlap */
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PMUL(1);
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PMUL(0);
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#undef PMUL
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DT0 = d.d;
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}
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void helper_fexpand(CPUState *env)
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{
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VIS32 s;
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VIS64 d;
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s.l = (uint32_t)(*(uint64_t *)&DT0 & 0xffffffff);
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d.d = DT1;
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d.VIS_W64(0) = s.VIS_B32(0) << 4;
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d.VIS_W64(1) = s.VIS_B32(1) << 4;
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d.VIS_W64(2) = s.VIS_B32(2) << 4;
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d.VIS_W64(3) = s.VIS_B32(3) << 4;
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DT0 = d.d;
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}
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#define VIS_HELPER(name, F) \
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void name##16(CPUState *env) \
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{ \
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VIS64 s, d; \
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\
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s.d = DT0; \
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d.d = DT1; \
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\
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d.VIS_W64(0) = F(d.VIS_W64(0), s.VIS_W64(0)); \
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d.VIS_W64(1) = F(d.VIS_W64(1), s.VIS_W64(1)); \
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d.VIS_W64(2) = F(d.VIS_W64(2), s.VIS_W64(2)); \
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d.VIS_W64(3) = F(d.VIS_W64(3), s.VIS_W64(3)); \
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\
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DT0 = d.d; \
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} \
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\
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uint32_t name##16s(CPUState *env, uint32_t src1, \
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uint32_t src2) \
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{ \
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VIS32 s, d; \
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\
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s.l = src1; \
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d.l = src2; \
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\
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d.VIS_W32(0) = F(d.VIS_W32(0), s.VIS_W32(0)); \
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d.VIS_W32(1) = F(d.VIS_W32(1), s.VIS_W32(1)); \
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\
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return d.l; \
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} \
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\
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void name##32(CPUState *env) \
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{ \
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VIS64 s, d; \
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\
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s.d = DT0; \
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d.d = DT1; \
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\
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d.VIS_L64(0) = F(d.VIS_L64(0), s.VIS_L64(0)); \
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d.VIS_L64(1) = F(d.VIS_L64(1), s.VIS_L64(1)); \
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\
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DT0 = d.d; \
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} \
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\
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uint32_t name##32s(CPUState *env, uint32_t src1, \
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uint32_t src2) \
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{ \
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VIS32 s, d; \
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\
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s.l = src1; \
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d.l = src2; \
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\
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d.l = F(d.l, s.l); \
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\
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return d.l; \
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}
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#define FADD(a, b) ((a) + (b))
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#define FSUB(a, b) ((a) - (b))
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VIS_HELPER(helper_fpadd, FADD)
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VIS_HELPER(helper_fpsub, FSUB)
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#define VIS_CMPHELPER(name, F) \
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uint64_t name##16(CPUState *env) \
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{ \
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VIS64 s, d; \
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\
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s.d = DT0; \
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d.d = DT1; \
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\
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d.VIS_W64(0) = F(s.VIS_W64(0), d.VIS_W64(0)) ? 1 : 0; \
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d.VIS_W64(0) |= F(s.VIS_W64(1), d.VIS_W64(1)) ? 2 : 0; \
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d.VIS_W64(0) |= F(s.VIS_W64(2), d.VIS_W64(2)) ? 4 : 0; \
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d.VIS_W64(0) |= F(s.VIS_W64(3), d.VIS_W64(3)) ? 8 : 0; \
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d.VIS_W64(1) = d.VIS_W64(2) = d.VIS_W64(3) = 0; \
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\
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return d.ll; \
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} \
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\
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uint64_t name##32(CPUState *env) \
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{ \
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VIS64 s, d; \
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\
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s.d = DT0; \
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d.d = DT1; \
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\
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d.VIS_L64(0) = F(s.VIS_L64(0), d.VIS_L64(0)) ? 1 : 0; \
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d.VIS_L64(0) |= F(s.VIS_L64(1), d.VIS_L64(1)) ? 2 : 0; \
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d.VIS_L64(1) = 0; \
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\
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return d.ll; \
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}
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#define FCMPGT(a, b) ((a) > (b))
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#define FCMPEQ(a, b) ((a) == (b))
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#define FCMPLE(a, b) ((a) <= (b))
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#define FCMPNE(a, b) ((a) != (b))
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VIS_CMPHELPER(helper_fcmpgt, FCMPGT)
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VIS_CMPHELPER(helper_fcmpeq, FCMPEQ)
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VIS_CMPHELPER(helper_fcmple, FCMPLE)
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VIS_CMPHELPER(helper_fcmpne, FCMPNE)
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