mirror of
https://github.com/qemu/qemu.git
synced 2024-11-30 23:33:51 +08:00
ead5078cf1
While adding hppa64 support, the psw_v variable got extended from 32 to 64
bits. So, when packaging the PSW-V bit from the psw_v variable for interrupt
processing, check bit 31 instead the 63th (sign) bit.
This fixes a hard to find Linux kernel boot issue where the loss of the PSW-V
bit due to an ITLB interruption in the middle of a series of ds/addc
instructions (from the divU milicode library) generated the wrong division
result and thus triggered a Linux kernel crash.
Link: https://lore.kernel.org/lkml/718b8afe-222f-4b3a-96d3-93af0e4ceff1@roeck-us.net/
Reported-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Fixes:
|
||
---|---|---|
.. | ||
cpu-param.h | ||
cpu-qom.h | ||
cpu.c | ||
cpu.h | ||
fpu_helper.c | ||
gdbstub.c | ||
helper.c | ||
helper.h | ||
insns.decode | ||
int_helper.c | ||
Kconfig | ||
machine.c | ||
mem_helper.c | ||
meson.build | ||
op_helper.c | ||
sys_helper.c | ||
trace-events | ||
trace.h | ||
translate.c |