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6ebbf39000
allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
21 lines
368 B
C
21 lines
368 B
C
#define CRIS_MMU_ERR_EXEC 0
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#define CRIS_MMU_ERR_READ 1
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#define CRIS_MMU_ERR_WRITE 2
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#define CRIS_MMU_ERR_FLUSH 3
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struct cris_mmu_result_t
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{
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uint32_t phy;
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uint32_t pfn;
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int g:1;
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int v:1;
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int k:1;
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int w:1;
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int e:1;
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int cause_op;
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};
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int cris_mmu_translate(struct cris_mmu_result_t *res,
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CPUState *env, uint32_t vaddr,
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int rw, int mmu_idx);
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