mirror of
https://github.com/qemu/qemu.git
synced 2024-11-26 04:13:39 +08:00
e4fe830b50
The common pattern for system registers in a 64-bit capable ARM CPU is that when in AArch32 the cp15 register is a view of the bottom 32 bits of the 64-bit AArch64 system register; writes in AArch32 leave the top half unchanged. The most natural way to model this is to have the state field in the CPU struct be a 64 bit value, and simply have the AArch32 TCG code operate on a pointer to its lower half. For aarch64-linux-user the only registers we need to share like this are the thread-local-storage ones. Widen their fields to 64 bits and provide the 64 bit reginfo struct to make them visible in AArch64 state. Note that minor cleanup of the AArch64 system register encoding space means We can share the TPIDR_EL1 reginfo but need split encodings for TPIDR_EL0 and TPIDRRO_EL0. Since we're touching almost every line in QEMU that uses the c13_tls* fields in this patch anyway, we take the opportunity to rename them in line with the standard ARM architectural names for these registers. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
36 lines
1.1 KiB
C
36 lines
1.1 KiB
C
/*
|
|
* ARM specific CPU ABI and functions for linux-user
|
|
*
|
|
* Copyright (c) 2003 Fabrice Bellard
|
|
*
|
|
* This library is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
* License as published by the Free Software Foundation; either
|
|
* version 2 of the License, or (at your option) any later version.
|
|
*
|
|
* This library is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
* Lesser General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU Lesser General Public
|
|
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
#ifndef TARGET_CPU_H
|
|
#define TARGET_CPU_H
|
|
|
|
static inline void cpu_clone_regs(CPUARMState *env, target_ulong newsp)
|
|
{
|
|
if (newsp) {
|
|
env->regs[13] = newsp;
|
|
}
|
|
env->regs[0] = 0;
|
|
}
|
|
|
|
static inline void cpu_set_tls(CPUARMState *env, target_ulong newtls)
|
|
{
|
|
env->cp15.tpidrro_el0 = newtls;
|
|
}
|
|
|
|
#endif
|