Andrey Smirnov d64e5eabc4 pci: Add support for Designware IP block ... Add code needed to get a functional PCI subsytem when using in conjunction with upstream Linux guest (4.13+). Tested to work against "e1000e" (network adapter, using MSI interrupts) as well as "usb-ehci" (USB controller, using legacy PCI interrupts). Based on "i.MX6 Applications Processor Reference Manual" (Document Number: IMX6DQRM Rev. 4) as well as corresponding dirver in Linux kernel (circa 4.13 - 4.16 found in drivers/pci/dwc/*) Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2018-03-09 17:09:43 +00:00
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msi.h	pci: Convert msi_init() to Error and fix callers to check it	2016-07-05 13:14:41 +03:00
msix.h	pci: Convert msix_init() to Error and fix callers	2017-02-01 03:37:18 +02:00
pci_bridge.h	hw/pci-bridge: fix pcie root port's IO hints capability	2018-02-13 18:25:48 +02:00
pci_bus.h	pci: Move bridge data structures from pci_bus.h to pci_bridge.h	2017-12-05 19:13:45 +02:00
pci_host.h	pci: Fold host_buses list into PCIHostState functionality	2013-07-07 23:10:57 +03:00
pci_ids.h	pci: Add support for Designware IP block	2018-03-09 17:09:43 +00:00
pci_regs.h	pci: Introduce define for PM capability version 1.1	2016-06-02 10:42:09 +08:00
pci.h	pci: removed the is_express field since a uniform interface was inserted	2018-02-08 21:06:41 +02:00
pcie_aer.h	pci: Reduce scope of error injection	2017-05-08 20:32:14 +02:00
pcie_host.h	ppc4xx: Add device models found in PPC440 core SoCs	2018-02-16 14:06:07 +11:00
pcie_port.h	hw/pci: add QEMU-specific PCI capability to the Generic PCI Express Root Port	2017-09-08 16:15:17 +03:00
pcie_regs.h	pcie: Add support for PCIe CAP v1	2016-06-02 10:42:26 +08:00
pcie.h	pci: Convert to realize	2017-07-03 22:29:49 +03:00
shpc.h	pci: Convert shpc_init() to Error	2017-07-03 22:29:49 +03:00
slotid_cap.h	pci: Convert shpc_init() to Error	2017-07-03 22:29:49 +03:00