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c02f9892af
The OPAL test suite runs a read-erase-write test on the PNOR : https://github.com/open-power/op-test/blob/master/testcases/OpTestPNOR.py which revealed that the IPMI HIOMAP handlers didn't support HIOMAP_C_ERASE. Implement the sector erase command by writing 0xFF in the PNOR memory region. Cc: Corey Minyard <cminyard@mvista.com> Reported-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20200820164638.2515681-1-clg@kaod.org> Acked-by: Corey Minyard <cminyard@mvista.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
306 lines
8.7 KiB
C
306 lines
8.7 KiB
C
/*
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* QEMU PowerNV, BMC related functions
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*
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* Copyright (c) 2016-2017, IBM Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "qapi/error.h"
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#include "target/ppc/cpu.h"
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#include "qemu/log.h"
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#include "hw/ipmi/ipmi.h"
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#include "hw/ppc/fdt.h"
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#include "hw/ppc/pnv.h"
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#include <libfdt.h>
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/* TODO: include definition in ipmi.h */
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#define IPMI_SDR_FULL_TYPE 1
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/*
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* OEM SEL Event data packet sent by BMC in response of a Read Event
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* Message Buffer command
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*/
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typedef struct OemSel {
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/* SEL header */
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uint8_t id[2];
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uint8_t type;
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uint8_t timestamp[4];
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uint8_t manuf_id[3];
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/* OEM SEL data (6 bytes) follows */
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uint8_t netfun;
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uint8_t cmd;
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uint8_t data[4];
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} OemSel;
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#define SOFT_OFF 0x00
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#define SOFT_REBOOT 0x01
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static void pnv_gen_oem_sel(IPMIBmc *bmc, uint8_t reboot)
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{
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/* IPMI SEL Event are 16 bytes long */
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OemSel sel = {
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.id = { 0x55 , 0x55 },
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.type = 0xC0, /* OEM */
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.manuf_id = { 0x0, 0x0, 0x0 },
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.timestamp = { 0x0, 0x0, 0x0, 0x0 },
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.netfun = 0x3A, /* IBM */
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.cmd = 0x04, /* AMI OEM SEL Power Notification */
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.data = { reboot, 0xFF, 0xFF, 0xFF },
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};
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ipmi_bmc_gen_event(bmc, (uint8_t *) &sel, 0 /* do not log the event */);
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}
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void pnv_bmc_powerdown(IPMIBmc *bmc)
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{
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pnv_gen_oem_sel(bmc, SOFT_OFF);
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}
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void pnv_dt_bmc_sensors(IPMIBmc *bmc, void *fdt)
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{
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int offset;
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int i;
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const struct ipmi_sdr_compact *sdr;
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uint16_t nextrec;
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offset = fdt_add_subnode(fdt, 0, "bmc");
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_FDT(offset);
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_FDT((fdt_setprop_string(fdt, offset, "name", "bmc")));
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offset = fdt_add_subnode(fdt, offset, "sensors");
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_FDT(offset);
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_FDT((fdt_setprop_cell(fdt, offset, "#address-cells", 0x1)));
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_FDT((fdt_setprop_cell(fdt, offset, "#size-cells", 0x0)));
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for (i = 0; !ipmi_bmc_sdr_find(bmc, i, &sdr, &nextrec); i++) {
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int off;
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char *name;
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if (sdr->header.rec_type != IPMI_SDR_COMPACT_TYPE &&
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sdr->header.rec_type != IPMI_SDR_FULL_TYPE) {
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continue;
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}
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name = g_strdup_printf("sensor@%x", sdr->sensor_owner_number);
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off = fdt_add_subnode(fdt, offset, name);
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_FDT(off);
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g_free(name);
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_FDT((fdt_setprop_cell(fdt, off, "reg", sdr->sensor_owner_number)));
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_FDT((fdt_setprop_string(fdt, off, "name", "sensor")));
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_FDT((fdt_setprop_string(fdt, off, "compatible", "ibm,ipmi-sensor")));
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_FDT((fdt_setprop_cell(fdt, off, "ipmi-sensor-reading-type",
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sdr->reading_type)));
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_FDT((fdt_setprop_cell(fdt, off, "ipmi-entity-id",
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sdr->entity_id)));
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_FDT((fdt_setprop_cell(fdt, off, "ipmi-entity-instance",
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sdr->entity_instance)));
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_FDT((fdt_setprop_cell(fdt, off, "ipmi-sensor-type",
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sdr->sensor_type)));
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}
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}
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/*
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* HIOMAP protocol handler
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*/
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#define HIOMAP_C_RESET 1
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#define HIOMAP_C_GET_INFO 2
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#define HIOMAP_C_GET_FLASH_INFO 3
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#define HIOMAP_C_CREATE_READ_WINDOW 4
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#define HIOMAP_C_CLOSE_WINDOW 5
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#define HIOMAP_C_CREATE_WRITE_WINDOW 6
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#define HIOMAP_C_MARK_DIRTY 7
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#define HIOMAP_C_FLUSH 8
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#define HIOMAP_C_ACK 9
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#define HIOMAP_C_ERASE 10
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#define HIOMAP_C_DEVICE_NAME 11
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#define HIOMAP_C_LOCK 12
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#define BLOCK_SHIFT 12 /* 4K */
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static uint16_t bytes_to_blocks(uint32_t bytes)
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{
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return bytes >> BLOCK_SHIFT;
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}
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static uint32_t blocks_to_bytes(uint16_t blocks)
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{
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return blocks << BLOCK_SHIFT;
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}
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static int hiomap_erase(PnvPnor *pnor, uint32_t offset, uint32_t size)
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{
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MemTxResult result;
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int i;
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for (i = 0; i < size / 4; i++) {
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result = memory_region_dispatch_write(&pnor->mmio, offset + i * 4,
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0xFFFFFFFF, MO_32,
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MEMTXATTRS_UNSPECIFIED);
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if (result != MEMTX_OK) {
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return -1;
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}
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}
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return 0;
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}
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static void hiomap_cmd(IPMIBmcSim *ibs, uint8_t *cmd, unsigned int cmd_len,
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RspBuffer *rsp)
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{
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PnvPnor *pnor = PNV_PNOR(object_property_get_link(OBJECT(ibs), "pnor",
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&error_abort));
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uint32_t pnor_size = pnor->size;
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uint32_t pnor_addr = PNOR_SPI_OFFSET;
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bool readonly = false;
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rsp_buffer_push(rsp, cmd[2]);
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rsp_buffer_push(rsp, cmd[3]);
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switch (cmd[2]) {
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case HIOMAP_C_MARK_DIRTY:
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case HIOMAP_C_FLUSH:
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case HIOMAP_C_ACK:
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break;
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case HIOMAP_C_ERASE:
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if (hiomap_erase(pnor, blocks_to_bytes(cmd[5] << 8 | cmd[4]),
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blocks_to_bytes(cmd[7] << 8 | cmd[6]))) {
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rsp_buffer_set_error(rsp, IPMI_CC_UNSPECIFIED);
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}
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break;
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case HIOMAP_C_GET_INFO:
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rsp_buffer_push(rsp, 2); /* Version 2 */
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rsp_buffer_push(rsp, BLOCK_SHIFT); /* block size */
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rsp_buffer_push(rsp, 0); /* Timeout */
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rsp_buffer_push(rsp, 0); /* Timeout */
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break;
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case HIOMAP_C_GET_FLASH_INFO:
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rsp_buffer_push(rsp, bytes_to_blocks(pnor_size) & 0xFF);
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rsp_buffer_push(rsp, bytes_to_blocks(pnor_size) >> 8);
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rsp_buffer_push(rsp, 0x01); /* erase size */
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rsp_buffer_push(rsp, 0x00); /* erase size */
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break;
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case HIOMAP_C_CREATE_READ_WINDOW:
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readonly = true;
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/* Fall through */
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case HIOMAP_C_CREATE_WRITE_WINDOW:
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memory_region_set_readonly(&pnor->mmio, readonly);
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memory_region_set_enabled(&pnor->mmio, true);
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rsp_buffer_push(rsp, bytes_to_blocks(pnor_addr) & 0xFF);
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rsp_buffer_push(rsp, bytes_to_blocks(pnor_addr) >> 8);
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rsp_buffer_push(rsp, bytes_to_blocks(pnor_size) & 0xFF);
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rsp_buffer_push(rsp, bytes_to_blocks(pnor_size) >> 8);
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rsp_buffer_push(rsp, 0x00); /* offset */
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rsp_buffer_push(rsp, 0x00); /* offset */
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break;
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case HIOMAP_C_CLOSE_WINDOW:
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memory_region_set_enabled(&pnor->mmio, false);
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break;
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case HIOMAP_C_DEVICE_NAME:
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case HIOMAP_C_RESET:
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case HIOMAP_C_LOCK:
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default:
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qemu_log_mask(LOG_GUEST_ERROR, "HIOMAP: unknow command %02X\n", cmd[2]);
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break;
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}
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}
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#define HIOMAP 0x5a
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static const IPMICmdHandler hiomap_cmds[] = {
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[HIOMAP] = { hiomap_cmd, 3 },
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};
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static const IPMINetfn hiomap_netfn = {
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.cmd_nums = ARRAY_SIZE(hiomap_cmds),
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.cmd_handlers = hiomap_cmds
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};
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void pnv_bmc_set_pnor(IPMIBmc *bmc, PnvPnor *pnor)
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{
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object_ref(OBJECT(pnor));
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object_property_add_const_link(OBJECT(bmc), "pnor", OBJECT(pnor));
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/* Install the HIOMAP protocol handlers to access the PNOR */
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ipmi_sim_register_netfn(IPMI_BMC_SIMULATOR(bmc), IPMI_NETFN_OEM,
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&hiomap_netfn);
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}
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/*
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* Instantiate the machine BMC. PowerNV uses the QEMU internal
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* simulator but it could also be external.
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*/
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IPMIBmc *pnv_bmc_create(PnvPnor *pnor)
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{
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Object *obj;
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obj = object_new(TYPE_IPMI_BMC_SIMULATOR);
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object_ref(OBJECT(pnor));
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object_property_add_const_link(obj, "pnor", OBJECT(pnor));
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qdev_realize(DEVICE(obj), NULL, &error_fatal);
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/* Install the HIOMAP protocol handlers to access the PNOR */
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ipmi_sim_register_netfn(IPMI_BMC_SIMULATOR(obj), IPMI_NETFN_OEM,
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&hiomap_netfn);
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return IPMI_BMC(obj);
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}
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typedef struct ForeachArgs {
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const char *name;
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Object *obj;
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} ForeachArgs;
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static int bmc_find(Object *child, void *opaque)
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{
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ForeachArgs *args = opaque;
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if (object_dynamic_cast(child, args->name)) {
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if (args->obj) {
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return 1;
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}
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args->obj = child;
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}
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return 0;
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}
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IPMIBmc *pnv_bmc_find(Error **errp)
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{
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ForeachArgs args = { TYPE_IPMI_BMC_SIMULATOR, NULL };
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int ret;
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ret = object_child_foreach_recursive(object_get_root(), bmc_find, &args);
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if (ret) {
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error_setg(errp, "machine should have only one BMC device. "
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"Use '-nodefaults'");
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return NULL;
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}
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return args.obj ? IPMI_BMC(args.obj) : NULL;
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}
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