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d2623129a7
The only way object_property_add() can fail is when a property with the same name already exists. Since our property names are all hardcoded, failure is a programming error, and the appropriate way to handle it is passing &error_abort. Same for its variants, except for object_property_add_child(), which additionally fails when the child already has a parent. Parentage is also under program control, so this is a programming error, too. We have a bit over 500 callers. Almost half of them pass &error_abort, slightly fewer ignore errors, one test case handles errors, and the remaining few callers pass them to their own callers. The previous few commits demonstrated once again that ignoring programming errors is a bad idea. Of the few ones that pass on errors, several violate the Error API. The Error ** argument must be NULL, &error_abort, &error_fatal, or a pointer to a variable containing NULL. Passing an argument of the latter kind twice without clearing it in between is wrong: if the first call sets an error, it no longer points to NULL for the second call. ich9_pm_add_properties(), sparc32_ledma_realize(), sparc32_dma_realize(), xilinx_axidma_realize(), xilinx_enet_realize() are wrong that way. When the one appropriate choice of argument is &error_abort, letting users pick the argument is a bad idea. Drop parameter @errp and assert the preconditions instead. There's one exception to "duplicate property name is a programming error": the way object_property_add() implements the magic (and undocumented) "automatic arrayification". Don't drop @errp there. Instead, rename object_property_add() to object_property_try_add(), and add the obvious wrapper object_property_add(). Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20200505152926.18877-15-armbru@redhat.com> [Two semantic rebase conflicts resolved]
118 lines
3.7 KiB
C
118 lines
3.7 KiB
C
/*
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* SABRELITE Board System emulation.
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*
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* Copyright (c) 2015 Jean-Christophe Dubois <jcd@tribudubois.net>
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*
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* This code is licensed under the GPL, version 2 or later.
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* See the file `COPYING' in the top level directory.
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*
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* It (partially) emulates a sabrelite board, with a Freescale
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* i.MX6 SoC
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "hw/arm/fsl-imx6.h"
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#include "hw/boards.h"
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#include "hw/qdev-properties.h"
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#include "sysemu/sysemu.h"
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#include "qemu/error-report.h"
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#include "sysemu/qtest.h"
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static struct arm_boot_info sabrelite_binfo = {
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/* DDR memory start */
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.loader_start = FSL_IMX6_MMDC_ADDR,
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/* No board ID, we boot from DT tree */
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.board_id = -1,
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};
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/* No need to do any particular setup for secondary boot */
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static void sabrelite_write_secondary(ARMCPU *cpu,
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const struct arm_boot_info *info)
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{
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}
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/* Secondary cores are reset through SRC device */
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static void sabrelite_reset_secondary(ARMCPU *cpu,
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const struct arm_boot_info *info)
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{
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}
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static void sabrelite_init(MachineState *machine)
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{
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FslIMX6State *s;
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Error *err = NULL;
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/* Check the amount of memory is compatible with the SOC */
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if (machine->ram_size > FSL_IMX6_MMDC_SIZE) {
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error_report("RAM size " RAM_ADDR_FMT " above max supported (%08x)",
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machine->ram_size, FSL_IMX6_MMDC_SIZE);
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exit(1);
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}
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s = FSL_IMX6(object_new(TYPE_FSL_IMX6));
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object_property_add_child(OBJECT(machine), "soc", OBJECT(s));
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object_property_set_bool(OBJECT(s), true, "realized", &err);
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if (err != NULL) {
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error_report("%s", error_get_pretty(err));
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exit(1);
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}
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memory_region_add_subregion(get_system_memory(), FSL_IMX6_MMDC_ADDR,
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machine->ram);
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{
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/*
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* TODO: Ideally we would expose the chip select and spi bus on the
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* SoC object using alias properties; then we would not need to
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* directly access the underlying spi device object.
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*/
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/* Add the sst25vf016b NOR FLASH memory to first SPI */
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Object *spi_dev;
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spi_dev = object_resolve_path_component(OBJECT(s), "spi1");
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if (spi_dev) {
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SSIBus *spi_bus;
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spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(spi_dev), "spi");
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if (spi_bus) {
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DeviceState *flash_dev;
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qemu_irq cs_line;
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DriveInfo *dinfo = drive_get_next(IF_MTD);
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flash_dev = ssi_create_slave_no_init(spi_bus, "sst25vf016b");
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if (dinfo) {
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qdev_prop_set_drive(flash_dev, "drive",
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blk_by_legacy_dinfo(dinfo),
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&error_fatal);
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}
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qdev_init_nofail(flash_dev);
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cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
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sysbus_connect_irq(SYS_BUS_DEVICE(spi_dev), 1, cs_line);
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}
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}
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}
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sabrelite_binfo.ram_size = machine->ram_size;
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sabrelite_binfo.nb_cpus = machine->smp.cpus;
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sabrelite_binfo.secure_boot = true;
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sabrelite_binfo.write_secondary_boot = sabrelite_write_secondary;
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sabrelite_binfo.secondary_cpu_reset_hook = sabrelite_reset_secondary;
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if (!qtest_enabled()) {
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arm_load_kernel(&s->cpu[0], machine, &sabrelite_binfo);
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}
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}
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static void sabrelite_machine_init(MachineClass *mc)
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{
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mc->desc = "Freescale i.MX6 Quad SABRE Lite Board (Cortex A9)";
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mc->init = sabrelite_init;
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mc->max_cpus = FSL_IMX6_NUM_CPUS;
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mc->ignore_memory_transaction_failures = true;
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mc->default_ram_id = "sabrelite.ram";
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}
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DEFINE_MACHINE("sabrelite", sabrelite_machine_init)
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