Serge Vakulenko ceb0ee147d pic32: use LCG algorithm for generated random index of TLBWR instruction ... The LFSR algorithm, used for generating random TLB indexes for TLBWR instruction, was inclined to produce a degenerate sequence in some cases. For example, for 16-entry TLB size and Wired=1, it gives: 15, 6, 7, 2, 7, 2, 7, 2, 7, 2, 7, 2, 7, 2, 7, 2, 7, 2, 7, 2, 7, 2, 7, 2, 7, 2, 7, 2... When replaced with LCG algorithm from ISO/IEC 9899 standard, the sequence looks much better, with about the same computational effort needed. Signed-off-by: Serge Vakulenko <serge.vakulenko@gmail.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>		2015-09-18 09:20:48 +01:00
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addr.c	hw/mips: Add API to convert KVM guest KSEG0 <-> GPA	2014-06-18 16:58:10 +02:00
cputimer.c	pic32: use LCG algorithm for generated random index of TLBWR instruction	2015-09-18 09:20:48 +01:00
gt64xxx_pci.c	gt64xxx: remove isa_mem_base usage	2015-02-13 14:09:27 +00:00
Makefile.objs	mips jazz: compile only in 64 bit	2015-06-11 10:13:29 +01:00
mips_fulong2e.c	i8257: remove cpu_request_exit irq	2015-09-09 15:34:53 +02:00
mips_int.c	hw/mips: In KVM mode, inject IRQ2 (I/O) interrupts via ioctls	2014-06-18 16:59:12 +02:00
mips_jazz.c	i8257: remove cpu_request_exit irq	2015-09-09 15:34:53 +02:00
mips_malta.c	i8257: remove cpu_request_exit irq	2015-09-09 15:34:53 +02:00
mips_mipssim.c	mips: memory: Replace memory_region_init_ram with memory_region_allocate_system_memory	2015-03-25 14:35:31 +01:00
mips_r4k.c	maint: avoid useless "if (foo) free(foo)" pattern	2015-09-11 10:21:38 +03:00