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c46cabd4a9
Implement nios2 Vectored Interrupt Controller (VIC). VIC is connected to EIC. It needs to update rha, ril, rrs and rnmi fields on Nios2CPU before raising an IRQ. For that purpose, VIC has a "cpu" property which should refer to the nios2 cpu and set by the board that connects VIC. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Amir Gonnen <amir.gonnen@neuroblade.ai> Message-Id: <20220303153906.2024748-5-amir.gonnen@neuroblade.ai> [rth: Split out nios2_vic.h] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-60-richard.henderson@linaro.org>
90 lines
962 B
Plaintext
90 lines
962 B
Plaintext
config HEATHROW_PIC
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bool
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config I8259
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bool
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select ISA_BUS
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config PL190
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bool
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config IOAPIC
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bool
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select I8259
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config ARM_GIC
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bool
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select MSI_NONBROKEN
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config OPENPIC
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bool
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select MSI_NONBROKEN
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config APIC
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bool
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select MSI_NONBROKEN
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select I8259
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config ARM_GICV3_TCG
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bool
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default y
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depends on ARM_GIC && TCG
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config ARM_GIC_KVM
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bool
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default y
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depends on ARM_GIC && KVM
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config XICS
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bool
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config XIVE
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bool
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config ALLWINNER_A10_PIC
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bool
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config S390_FLIC
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bool
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config S390_FLIC_KVM
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bool
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default y
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depends on S390_FLIC && KVM
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config OMPIC
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bool
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config PPC_UIC
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bool
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config SH_INTC
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bool
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config RX_ICU
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bool
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config LOONGSON_LIOINTC
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bool
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config RISCV_ACLINT
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bool
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config RISCV_APLIC
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bool
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config RISCV_IMSIC
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bool
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config SIFIVE_PLIC
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bool
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config GOLDFISH_PIC
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bool
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config M68K_IRQC
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bool
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config NIOS2_VIC
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bool
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