qemu/target-arm
Peter Maydell c0f4af1719 target-arm: Don't handle c15_cpar changes via tb_flush()
At the moment we try to handle c15_cpar with the strategy of:
 * emit generated code which makes assumptions about its value
 * when the register value changes call tb_flush() to throw
   away the now-invalid generated code
This works because XScale CPUs are always uniprocessor, but
it's confusing because it suggests that the same approach can
be taken for other registers. It also means we do a tb_flush()
on CPU reset, which makes multithreaded linux-user binaries
even more likely to fail than would otherwise be the case.

Replace it with a combination of TB flags for the access
checks done on cp0/cp1 for the XScale and iwMMXt instructions,
plus a runtime check for cp2..cp13 coprocessor accesses.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1411056959-23070-1-git-send-email-peter.maydell@linaro.org
2014-09-29 18:48:48 +01:00
..
arm_ldst.h softmmu: introduce cpu_ldst.h 2014-06-05 16:10:33 +02:00
arm-semi.c cpu: Move opaque field from CPU_COMMON to CPUState 2014-03-13 19:20:47 +01:00
cpu64.c target-arm: Use cpu_exec_interrupt qom hook 2014-09-25 18:54:22 +01:00
cpu-qom.h target-arm: Use cpu_exec_interrupt qom hook 2014-09-25 18:54:22 +01:00
cpu.c target-arm: Don't handle c15_cpar changes via tb_flush() 2014-09-29 18:48:48 +01:00
cpu.h target-arm: Don't handle c15_cpar changes via tb_flush() 2014-09-29 18:48:48 +01:00
crypto_helper.c target-arm: Use Common Tables in AES Instructions 2014-06-16 13:24:33 +02:00
gdbstub64.c target-arm/gdbstub64.c: remove useless 'break' statement. 2014-04-17 21:34:06 +01:00
gdbstub.c cpu: Introduce CPUClass::gdb_{read,write}_register() 2013-07-27 00:04:17 +02:00
helper-a64.c target-arm: Make far_el1 an array 2014-08-04 14:41:54 +01:00
helper-a64.h target-arm: A64: Implement CRC instructions 2014-06-09 16:06:12 +01:00
helper.c target-arm: Don't handle c15_cpar changes via tb_flush() 2014-09-29 18:48:48 +01:00
helper.h target-arm: Implement ARMv8 single-step handling for A64 code 2014-08-19 19:02:03 +01:00
internals.h target-arm: Implement handling of breakpoint firing 2014-09-29 18:48:46 +01:00
iwmmxt_helper.c target-arm: Delete unused iwmmxt_msadb helper 2014-06-09 16:06:12 +01:00
kvm32.c target-arm: Implement vCPU reset via KVM_ARM_VCPU_INIT for 32-bit CPUs 2014-07-08 13:05:11 +01:00
kvm64.c target-arm: A64: Break out aarch64_save/restore_sp 2014-08-04 14:41:54 +01:00
kvm_arm.h target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64 2014-06-19 18:33:02 +01:00
kvm-consts.h arm/virt: Use PSCI v0.2 function IDs in the DT when KVM uses PSCI v0.2 2014-08-19 19:02:25 +01:00
kvm-stub.c target-arm: Initialize cpreg list from KVM when using KVM 2013-06-25 18:16:10 +01:00
kvm.c target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64 2014-06-19 18:33:02 +01:00
machine.c target-arm: Implement setting guest breakpoints 2014-09-29 18:48:46 +01:00
Makefile.objs target-arm: A64: add stubs for a64 specific helpers 2013-12-17 19:42:32 +00:00
neon_helper.c target-arm: add support for v8 VMULL.P64 instruction 2014-06-09 16:06:11 +01:00
op_addsub.h Correct spelling of licensed 2011-07-23 11:26:12 -05:00
op_helper.c target-arm: Don't handle c15_cpar changes via tb_flush() 2014-09-29 18:48:48 +01:00
translate-a64.c target-arm: Implement ARMv8 single-step handling for A64 code 2014-08-19 19:02:03 +01:00
translate.c target-arm: Don't handle c15_cpar changes via tb_flush() 2014-09-29 18:48:48 +01:00
translate.h target-arm: Don't handle c15_cpar changes via tb_flush() 2014-09-29 18:48:48 +01:00