qemu/target-mips
pbrook b3c7724cbc Move CPU save/load registration to common code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-30 16:31:04 +00:00
..
cpu.h Move CPU save/load registration to common code. 2008-06-30 16:31:04 +00:00
exec.h Remove remaining uses of T0 in the MIPS target. 2008-06-24 21:58:35 +00:00
helper.c More efficient target register / TC accesses. 2008-06-27 10:02:35 +00:00
helper.h Remove unnecessary helper arguments, and fix some typos. 2008-06-29 14:53:11 +00:00
machine.c remove target ifdefs from vl.c 2008-05-04 13:11:44 +00:00
mips-defs.h Support for VR5432, and some of its special instructions. Original patch 2007-12-25 20:46:56 +00:00
op_helper.c Remove unnecessary helper arguments, and fix some typos. 2008-06-29 14:53:11 +00:00
TODO Clarify some TODO items. 2008-06-24 22:04:41 +00:00
translate_init.c More efficient target register / TC accesses. 2008-06-27 10:02:35 +00:00
translate.c Make bcond and btarget TCG registers. 2008-06-30 11:30:34 +00:00