qemu/include/fpu
Richard Henderson b299e88d42 softfloat: Specialize udiv_qrnnd for x86_64
The ISA has a 128/64-bit division instruction.

Tested-by: Emilio G. Cota <cota@braap.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-10-05 12:57:41 -05:00
..
softfloat-macros.h softfloat: Specialize udiv_qrnnd for x86_64 2018-10-05 12:57:41 -05:00
softfloat-types.h fpu/softfloat: Specialize on snan_bit_is_one 2018-05-17 15:27:15 -07:00
softfloat.h softfloat: remove float64_trunc_to_int 2018-10-05 12:57:41 -05:00