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b115bb3feb
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4857 c046a42c-6fe2-441c-8c8c-71466251a162
324 lines
8.9 KiB
C
324 lines
8.9 KiB
C
/*
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* SSD0303 OLED controller with OSRAM Pictiva 96x16 display.
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*
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* Copyright (c) 2006-2007 CodeSourcery.
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* Written by Paul Brook
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*
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* This code is licenced under the GPL.
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*/
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/* The controller can support a variety of different displays, but we only
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implement one. Most of the commends relating to brightness and geometry
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setup are ignored. */
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#include "hw.h"
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#include "i2c.h"
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#include "console.h"
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//#define DEBUG_SSD0303 1
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#ifdef DEBUG_SSD0303
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#define DPRINTF(fmt, args...) \
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do { printf("ssd0303: " fmt , ##args); } while (0)
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#define BADF(fmt, args...) \
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do { fprintf(stderr, "ssd0303: error: " fmt , ##args); exit(1);} while (0)
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#else
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#define DPRINTF(fmt, args...) do {} while(0)
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#define BADF(fmt, args...) \
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do { fprintf(stderr, "ssd0303: error: " fmt , ##args);} while (0)
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#endif
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/* Scaling factor for pixels. */
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#define MAGNIFY 4
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enum ssd0303_mode
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{
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SSD0303_IDLE,
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SSD0303_DATA,
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SSD0303_CMD
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};
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enum ssd0303_cmd {
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SSD0303_CMD_NONE,
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SSD0303_CMD_SKIP1
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};
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typedef struct {
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i2c_slave i2c;
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DisplayState *ds;
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QEMUConsole *console;
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int row;
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int col;
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int start_line;
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int mirror;
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int flash;
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int enabled;
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int inverse;
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int redraw;
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enum ssd0303_mode mode;
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enum ssd0303_cmd cmd_state;
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uint8_t framebuffer[132*8];
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} ssd0303_state;
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static int ssd0303_recv(i2c_slave *i2c)
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{
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BADF("Reads not implemented\n");
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return -1;
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}
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static int ssd0303_send(i2c_slave *i2c, uint8_t data)
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{
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ssd0303_state *s = (ssd0303_state *)i2c;
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enum ssd0303_cmd old_cmd_state;
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switch (s->mode) {
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case SSD0303_IDLE:
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DPRINTF("byte 0x%02x\n", data);
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if (data == 0x80)
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s->mode = SSD0303_CMD;
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else if (data == 0x40)
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s->mode = SSD0303_DATA;
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else
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BADF("Unexpected byte 0x%x\n", data);
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break;
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case SSD0303_DATA:
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DPRINTF("data 0x%02x\n", data);
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if (s->col < 132) {
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s->framebuffer[s->col + s->row * 132] = data;
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s->col++;
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s->redraw = 1;
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}
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break;
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case SSD0303_CMD:
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old_cmd_state = s->cmd_state;
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s->cmd_state = SSD0303_CMD_NONE;
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switch (old_cmd_state) {
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case SSD0303_CMD_NONE:
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DPRINTF("cmd 0x%02x\n", data);
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s->mode = SSD0303_IDLE;
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switch (data) {
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case 0x00 ... 0x0f: /* Set lower colum address. */
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s->col = (s->col & 0xf0) | (data & 0xf);
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break;
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case 0x10 ... 0x20: /* Set higher column address. */
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s->col = (s->col & 0x0f) | ((data & 0xf) << 4);
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break;
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case 0x40 ... 0x7f: /* Set start line. */
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s->start_line = 0;
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break;
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case 0x81: /* Set contrast (Ignored). */
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s->cmd_state = SSD0303_CMD_SKIP1;
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break;
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case 0xa0: /* Mirror off. */
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s->mirror = 0;
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break;
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case 0xa1: /* Mirror off. */
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s->mirror = 1;
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break;
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case 0xa4: /* Entire display off. */
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s->flash = 0;
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break;
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case 0xa5: /* Entire display on. */
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s->flash = 1;
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break;
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case 0xa6: /* Inverse off. */
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s->inverse = 0;
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break;
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case 0xa7: /* Inverse on. */
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s->inverse = 1;
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break;
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case 0xa8: /* Set multipled ratio (Ignored). */
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s->cmd_state = SSD0303_CMD_SKIP1;
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break;
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case 0xad: /* DC-DC power control. */
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s->cmd_state = SSD0303_CMD_SKIP1;
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break;
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case 0xae: /* Display off. */
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s->enabled = 0;
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break;
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case 0xaf: /* Display on. */
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s->enabled = 1;
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break;
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case 0xb0 ... 0xbf: /* Set Page address. */
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s->row = data & 7;
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break;
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case 0xc0 ... 0xc8: /* Set COM output direction (Ignored). */
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break;
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case 0xd3: /* Set display offset (Ignored). */
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s->cmd_state = SSD0303_CMD_SKIP1;
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break;
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case 0xd5: /* Set display clock (Ignored). */
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s->cmd_state = SSD0303_CMD_SKIP1;
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break;
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case 0xd8: /* Set color and power mode (Ignored). */
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s->cmd_state = SSD0303_CMD_SKIP1;
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break;
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case 0xd9: /* Set pre-charge period (Ignored). */
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s->cmd_state = SSD0303_CMD_SKIP1;
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break;
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case 0xda: /* Set COM pin configuration (Ignored). */
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s->cmd_state = SSD0303_CMD_SKIP1;
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break;
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case 0xdb: /* Set VCOM dselect level (Ignored). */
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s->cmd_state = SSD0303_CMD_SKIP1;
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break;
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case 0xe3: /* no-op. */
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break;
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default:
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BADF("Unknown command: 0x%x\n", data);
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}
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break;
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case SSD0303_CMD_SKIP1:
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DPRINTF("skip 0x%02x\n", data);
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break;
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}
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break;
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}
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return 0;
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}
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static void ssd0303_event(i2c_slave *i2c, enum i2c_event event)
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{
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ssd0303_state *s = (ssd0303_state *)i2c;
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switch (event) {
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case I2C_FINISH:
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s->mode = SSD0303_IDLE;
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break;
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case I2C_START_RECV:
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case I2C_START_SEND:
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case I2C_NACK:
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/* Nothing to do. */
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break;
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}
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}
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static void ssd0303_update_display(void *opaque)
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{
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ssd0303_state *s = (ssd0303_state *)opaque;
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uint8_t *dest;
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uint8_t *src;
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int x;
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int y;
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int line;
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char *colors[2];
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char colortab[MAGNIFY * 8];
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int dest_width;
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uint8_t mask;
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if (!s->redraw)
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return;
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switch (s->ds->depth) {
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case 0:
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return;
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case 15:
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dest_width = 2;
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break;
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case 16:
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dest_width = 2;
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break;
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case 24:
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dest_width = 3;
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break;
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case 32:
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dest_width = 4;
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break;
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default:
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BADF("Bad color depth\n");
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return;
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}
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dest_width *= MAGNIFY;
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memset(colortab, 0xff, dest_width);
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memset(colortab + dest_width, 0, dest_width);
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if (s->flash) {
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colors[0] = colortab;
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colors[1] = colortab;
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} else if (s->inverse) {
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colors[0] = colortab;
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colors[1] = colortab + dest_width;
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} else {
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colors[0] = colortab + dest_width;
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colors[1] = colortab;
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}
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dest = s->ds->data;
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for (y = 0; y < 16; y++) {
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line = (y + s->start_line) & 63;
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src = s->framebuffer + 132 * (line >> 3) + 36;
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mask = 1 << (line & 7);
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for (x = 0; x < 96; x++) {
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memcpy(dest, colors[(*src & mask) != 0], dest_width);
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dest += dest_width;
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src++;
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}
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for (x = 1; x < MAGNIFY; x++) {
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memcpy(dest, dest - dest_width * 96, dest_width * 96);
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dest += dest_width * 96;
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}
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}
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s->redraw = 0;
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dpy_update(s->ds, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY);
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}
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static void ssd0303_invalidate_display(void * opaque)
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{
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ssd0303_state *s = (ssd0303_state *)opaque;
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s->redraw = 1;
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}
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static void ssd0303_save(QEMUFile *f, void *opaque)
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{
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ssd0303_state *s = (ssd0303_state *)opaque;
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qemu_put_be32(f, s->row);
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qemu_put_be32(f, s->col);
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qemu_put_be32(f, s->start_line);
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qemu_put_be32(f, s->mirror);
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qemu_put_be32(f, s->flash);
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qemu_put_be32(f, s->enabled);
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qemu_put_be32(f, s->inverse);
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qemu_put_be32(f, s->redraw);
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qemu_put_be32(f, s->mode);
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qemu_put_be32(f, s->cmd_state);
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qemu_put_buffer(f, s->framebuffer, sizeof(s->framebuffer));
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i2c_slave_save(f, &s->i2c);
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}
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static int ssd0303_load(QEMUFile *f, void *opaque, int version_id)
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{
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ssd0303_state *s = (ssd0303_state *)opaque;
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if (version_id != 1)
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return -EINVAL;
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s->row = qemu_get_be32(f);
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s->col = qemu_get_be32(f);
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s->start_line = qemu_get_be32(f);
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s->mirror = qemu_get_be32(f);
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s->flash = qemu_get_be32(f);
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s->enabled = qemu_get_be32(f);
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s->inverse = qemu_get_be32(f);
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s->redraw = qemu_get_be32(f);
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s->mode = qemu_get_be32(f);
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s->cmd_state = qemu_get_be32(f);
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qemu_get_buffer(f, s->framebuffer, sizeof(s->framebuffer));
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i2c_slave_load(f, &s->i2c);
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return 0;
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}
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void ssd0303_init(DisplayState *ds, i2c_bus *bus, int address)
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{
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ssd0303_state *s;
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s = (ssd0303_state *)i2c_slave_init(bus, address, sizeof(ssd0303_state));
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s->ds = ds;
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s->i2c.event = ssd0303_event;
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s->i2c.recv = ssd0303_recv;
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s->i2c.send = ssd0303_send;
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s->console = graphic_console_init(ds, ssd0303_update_display,
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ssd0303_invalidate_display,
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NULL, NULL, s);
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qemu_console_resize(s->console, 96 * MAGNIFY, 16 * MAGNIFY);
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register_savevm("ssd0303_oled", -1, 1, ssd0303_save, ssd0303_load, s);
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}
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