Richard Henderson ae0d4c0b52 target/lm32: Convert to CPUClass::tlb_fill ... Cc: Michael Walle <michael@walle.cc> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>		2019-05-10 11:12:50 -07:00
..
alpha	target/alpha: Convert to CPUClass::tlb_fill	2019-05-10 07:57:39 -07:00
arm	target/arm: Convert to CPUClass::tlb_fill	2019-05-10 11:12:50 -07:00
cris	target/cris: Convert to CPUClass::tlb_fill	2019-05-10 11:12:50 -07:00
hppa	target/hppa: Convert to CPUClass::tlb_fill	2019-05-10 11:12:50 -07:00
i386	target/i386: Convert to CPUClass::tlb_fill	2019-05-10 11:12:50 -07:00
lm32	target/lm32: Convert to CPUClass::tlb_fill	2019-05-10 11:12:50 -07:00
m68k	tcg: Hoist max_insns computation to tb_gen_code	2019-04-24 13:04:33 -07:00
microblaze	tcg: Hoist max_insns computation to tb_gen_code	2019-04-24 13:04:33 -07:00
mips	tcg: Hoist max_insns computation to tb_gen_code	2019-04-24 13:04:33 -07:00
moxie	tcg: Hoist max_insns computation to tb_gen_code	2019-04-24 13:04:33 -07:00
nios2	Add Nios II semihosting support.	2019-04-29 16:09:51 +01:00
openrisc	target/openrisc: Fix LGPL information in the file headers	2019-05-08 17:45:54 +02:00
ppc	Add tcg_gen_extract2_*.	2019-04-28 11:43:10 +01:00
riscv	decodetree: Add DisasContext argument to !function expanders	2019-05-06 11:18:34 -07:00
s390x	Add tcg_gen_extract2_*.	2019-04-28 11:43:10 +01:00
sh4	target/sh4: Fix LGPL information in the file headers	2019-05-08 17:45:54 +02:00
sparc	tcg: Hoist max_insns computation to tb_gen_code	2019-04-24 13:04:33 -07:00
tilegx	tcg: Hoist max_insns computation to tb_gen_code	2019-04-24 13:04:33 -07:00
tricore	tcg: Hoist max_insns computation to tb_gen_code	2019-04-24 13:04:33 -07:00
unicore32	tcg: Hoist max_insns computation to tb_gen_code	2019-04-24 13:04:33 -07:00
xtensa	tcg: Hoist max_insns computation to tb_gen_code	2019-04-24 13:04:33 -07:00