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ae03f8de45
qemu/target-i386
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Emilio G. Cota ae03f8de45 target-i386: emulate LOCK'ed cmpxchg using cmpxchg helpers 
The diff here is uglier than necessary. All this does is to turn

FOO

into:

if (s->prefix & PREFIX_LOCK) {
  BAR
} else {
  FOO
}

where FOO is the original implementation of an unlocked cmpxchg.

[rth: Adjust unlocked cmpxchg to use movcond instead of branches.
Adjust helpers to use atomic helpers.]

Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1467054136-10430-6-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-10-26 08:29:01 -07:00
..
arch_dump.c x86: Clean up includes 2016-01-29 15:07:22 +00:00
arch_memory_mapping.c x86: Clean up includes 2016-01-29 15:07:22 +00:00
bpt_helper.c cpu-exec: Rename cpu_resume_from_signal() to cpu_loop_exit_noexc() 2016-06-09 15:55:02 +01:00
cc_helper_template.h target-i386: Implement BLSR, BLSMSK, BLSI 2013-02-18 15:52:05 -08:00
cc_helper.c target-i386: Perform set/reset_inhibit_irq inline 2016-02-13 07:59:59 +11:00
cpu-qom.h exec: call cpu_exec_exit() from a CPU unrealize common function 2016-10-24 17:29:16 -02:00
cpu.c exec: call cpu_exec_exit() from a CPU unrealize common function 2016-10-24 17:29:16 -02:00
cpu.h pc: apic_common: Extend APIC ID property to 32bit 2016-10-24 17:29:15 -02:00
excp_helper.c cpu: move exec-all.h inclusion out of cpu.h 2016-05-19 16:42:29 +02:00
fpu_helper.c target-i386: Use struct X86XSaveArea in fpu_helper.c 2016-09-19 15:34:35 -03:00
gdbstub.c qemu-common: push cpu.h inclusion out of qemu-common.h 2016-05-19 16:42:29 +02:00
helper.c cpus: pass CPUState to run_on_cpu helpers 2016-09-27 11:57:29 +02:00
helper.h target-i386: emulate LOCK'ed cmpxchg using cmpxchg helpers 2016-10-26 08:29:01 -07:00
hyperv.c event-notifier: Add "is_external" parameter 2016-04-22 16:43:56 +02:00
hyperv.h Clean up header guards that don't match their file name 2016-07-12 16:19:16 +02:00
int_helper.c cpu: move exec-all.h inclusion out of cpu.h 2016-05-19 16:42:29 +02:00
kvm_i386.h pc: kvm_apic: Pass APIC ID depending on xAPIC/x2APIC mode 2016-10-24 17:29:15 -02:00
kvm-stub.c intel_iommu: reject broken EIM 2016-10-17 15:44:49 -02:00
kvm.c pc: kvm_apic: Pass APIC ID depending on xAPIC/x2APIC mode 2016-10-24 17:29:15 -02:00
machine.c target-i386: kvm: Add basic Intel LMCE support 2016-07-07 15:25:16 -03:00
Makefile.objs target-i386: Enable control registers for MPX 2016-02-13 07:59:59 +11:00
mem_helper.c target-i386: emulate LOCK'ed cmpxchg using cmpxchg helpers 2016-10-26 08:29:01 -07:00
misc_helper.c cpu: move exec-all.h inclusion out of cpu.h 2016-05-19 16:42:29 +02:00
monitor.c hmp: fix qemu crash due to ioapic state dump w/ split irqchip 2016-10-04 17:16:15 +01:00
mpx_helper.c cpu: move exec-all.h inclusion out of cpu.h 2016-05-19 16:42:29 +02:00
ops_sse_header.h target-i386: Rename struct XMMReg to ZMMReg 2016-01-21 12:47:15 -02:00
ops_sse.h target-i386: Rename XMM_[BWLSDQ] helpers to ZMM_* 2016-01-21 12:47:16 -02:00
seg_helper.c target-i386: Fixed syscall posssible segfault 2016-09-14 22:52:44 +02:00
shift_helper_template.h target-i386: compute eflags outside rcl/rcr helper 2013-02-18 15:03:56 -08:00
smm_helper.c target-i386: Enable control registers for MPX 2016-02-13 07:59:59 +11:00
svm_helper.c cpu: move exec-all.h inclusion out of cpu.h 2016-05-19 16:42:29 +02:00
svm.h Clean up ill-advised or unusual header guards 2016-07-12 16:20:46 +02:00
TODO target-i386: fix {min,max}{pd,ps,sd,ss} SSE2 instructions 2012-01-11 09:55:28 +01:00
trace-events trace-events: fix first line comment in trace-events 2016-08-12 10:36:01 +01:00
translate.c target-i386: emulate LOCK'ed cmpxchg using cmpxchg helpers 2016-10-26 08:29:01 -07:00