mirror of
https://github.com/qemu/qemu.git
synced 2024-11-26 04:13:39 +08:00
5fa45de562
This patch adds some hooks to let PCI devices and busses use the new IOMMU infrastructure. When IOMMU support is enabled, each PCI device now contains a DMAContext * which is used by the pci_dma_*() wrapper functions. By default, the contexts are initialized to NULL, assuming no IOMMU. However the platform or host bridge code which sets up the PCI bus can use pci_setup_iommu() to set a function which will determine the correct DMAContext for a given PCI device. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Richard Henderson <rth@twiddle.net> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Eduard - Gabriel Munteanu <eduard.munteanu@linux360.ro> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
70 lines
2.1 KiB
C
70 lines
2.1 KiB
C
#ifndef QEMU_PCI_INTERNALS_H
|
|
#define QEMU_PCI_INTERNALS_H
|
|
|
|
/*
|
|
* This header files is private to pci.c and pci_bridge.c
|
|
* So following structures are opaque to others and shouldn't be
|
|
* accessed.
|
|
*
|
|
* For pci-to-pci bridge needs to include this header file to embed
|
|
* PCIBridge in its structure or to get sizeof(PCIBridge),
|
|
* However, they shouldn't access those following members directly.
|
|
* Use accessor function in pci.h, pci_bridge.h
|
|
*/
|
|
|
|
#define TYPE_PCI_BUS "PCI"
|
|
#define PCI_BUS(obj) OBJECT_CHECK(PCIBus, (obj), TYPE_PCI_BUS)
|
|
|
|
struct PCIBus {
|
|
BusState qbus;
|
|
PCIDMAContextFunc dma_context_fn;
|
|
void *dma_context_opaque;
|
|
uint8_t devfn_min;
|
|
pci_set_irq_fn set_irq;
|
|
pci_map_irq_fn map_irq;
|
|
pci_hotplug_fn hotplug;
|
|
DeviceState *hotplug_qdev;
|
|
void *irq_opaque;
|
|
PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX];
|
|
PCIDevice *parent_dev;
|
|
MemoryRegion *address_space_mem;
|
|
MemoryRegion *address_space_io;
|
|
|
|
QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */
|
|
QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */
|
|
|
|
/* The bus IRQ state is the logical OR of the connected devices.
|
|
Keep a count of the number of devices with raised IRQs. */
|
|
int nirq;
|
|
int *irq_count;
|
|
};
|
|
|
|
struct PCIBridge {
|
|
PCIDevice dev;
|
|
|
|
/* private member */
|
|
PCIBus sec_bus;
|
|
/*
|
|
* Memory regions for the bridge's address spaces. These regions are not
|
|
* directly added to system_memory/system_io or its descendants.
|
|
* Bridge's secondary bus points to these, so that devices
|
|
* under the bridge see these regions as its address spaces.
|
|
* The regions are as large as the entire address space -
|
|
* they don't take into account any windows.
|
|
*/
|
|
MemoryRegion address_space_mem;
|
|
MemoryRegion address_space_io;
|
|
/*
|
|
* Aliases for each of the address space windows that the bridge
|
|
* can forward. Mapped into the bridge's parent's address space,
|
|
* as subregions.
|
|
*/
|
|
MemoryRegion alias_pref_mem;
|
|
MemoryRegion alias_mem;
|
|
MemoryRegion alias_io;
|
|
pci_map_irq_fn map_irq;
|
|
const char *bus_name;
|
|
};
|
|
|
|
#endif /* QEMU_PCI_INTERNALS_H */
|