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3a1e4561ad
The commit 198c0d1f9d s390x/css: check ccw address validity
exposes an alignment issue in ccw bios.
According to PoP the CCW must be doubleword aligned. Let's fix
this in the bios.
Cc: qemu-stable@nongnu.org
Signed-off-by: Farhan Ali <alifm@linux.vnet.ibm.com>
Reviewed-by: Halil Pasic <pasic@linux.vnet.ibm.com>
Reviewed-by: Eric Farman <farman@linux.vnet.ibm.com>
Acked-by: Christian Borntraeger <borntraeger@de.ibm.com>
Message-Id: <3ed8b810b6592daee6a775037ce21f850e40647d.1503667215.git.alifm@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
343 lines
9.0 KiB
C
343 lines
9.0 KiB
C
/*
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* Channel IO definitions
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*
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* Copyright (c) 2013 Alexander Graf <agraf@suse.de>
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*
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* Inspired by various s390 headers in Linux 3.9.
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or (at
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* your option) any later version. See the COPYING file in the top-level
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* directory.
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*/
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#ifndef CIO_H
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#define CIO_H
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/*
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* path management control word
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*/
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struct pmcw {
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__u32 intparm; /* interruption parameter */
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__u32 qf : 1; /* qdio facility */
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__u32 w : 1;
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__u32 isc : 3; /* interruption sublass */
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__u32 res5 : 3; /* reserved zeros */
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__u32 ena : 1; /* enabled */
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__u32 lm : 2; /* limit mode */
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__u32 mme : 2; /* measurement-mode enable */
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__u32 mp : 1; /* multipath mode */
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__u32 tf : 1; /* timing facility */
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__u32 dnv : 1; /* device number valid */
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__u32 dev : 16; /* device number */
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__u8 lpm; /* logical path mask */
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__u8 pnom; /* path not operational mask */
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__u8 lpum; /* last path used mask */
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__u8 pim; /* path installed mask */
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__u16 mbi; /* measurement-block index */
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__u8 pom; /* path operational mask */
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__u8 pam; /* path available mask */
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__u8 chpid[8]; /* CHPID 0-7 (if available) */
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__u32 unused1 : 8; /* reserved zeros */
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__u32 st : 3; /* subchannel type */
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__u32 unused2 : 18; /* reserved zeros */
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__u32 mbfc : 1; /* measurement block format control */
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__u32 xmwme : 1; /* extended measurement word mode enable */
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__u32 csense : 1; /* concurrent sense; can be enabled ...*/
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/* ... per MSCH, however, if facility */
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/* ... is not installed, this results */
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/* ... in an operand exception. */
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} __attribute__ ((packed));
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/* Target SCHIB configuration. */
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struct schib_config {
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__u64 mba;
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__u32 intparm;
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__u16 mbi;
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__u32 isc:3;
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__u32 ena:1;
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__u32 mme:2;
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__u32 mp:1;
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__u32 csense:1;
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__u32 mbfc:1;
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} __attribute__ ((packed));
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struct scsw {
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__u16 flags;
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__u16 ctrl;
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__u32 cpa;
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__u8 dstat;
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__u8 cstat;
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__u16 count;
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} __attribute__ ((packed));
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#define SCSW_FCTL_CLEAR_FUNC 0x1000
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#define SCSW_FCTL_HALT_FUNC 0x2000
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#define SCSW_FCTL_START_FUNC 0x4000
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/*
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* subchannel information block
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*/
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struct schib {
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struct pmcw pmcw; /* path management control word */
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struct scsw scsw; /* subchannel status word */
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__u64 mba; /* measurement block address */
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__u8 mda[4]; /* model dependent area */
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} __attribute__ ((packed,aligned(4)));
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struct subchannel_id {
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__u32 cssid : 8;
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__u32 : 4;
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__u32 m : 1;
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__u32 ssid : 2;
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__u32 one : 1;
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__u32 sch_no : 16;
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} __attribute__ ((packed, aligned(4)));
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struct chsc_header {
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__u16 length;
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__u16 code;
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} __attribute__((packed));
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struct chsc_area_sda {
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struct chsc_header request;
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__u8 reserved1:4;
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__u8 format:4;
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__u8 reserved2;
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__u16 operation_code;
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__u32 reserved3;
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__u32 reserved4;
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__u32 operation_data_area[252];
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struct chsc_header response;
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__u32 reserved5:4;
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__u32 format2:4;
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__u32 reserved6:24;
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} __attribute__((packed));
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/*
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* TPI info structure
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*/
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struct tpi_info {
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struct subchannel_id schid;
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__u32 intparm; /* interruption parameter */
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__u32 adapter_IO : 1;
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__u32 reserved2 : 1;
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__u32 isc : 3;
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__u32 reserved3 : 12;
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__u32 int_type : 3;
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__u32 reserved4 : 12;
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} __attribute__ ((packed));
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/* channel command word (type 1) */
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struct ccw1 {
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__u8 cmd_code;
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__u8 flags;
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__u16 count;
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__u32 cda;
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} __attribute__ ((packed, aligned(8)));
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#define CCW_FLAG_DC 0x80
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#define CCW_FLAG_CC 0x40
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#define CCW_FLAG_SLI 0x20
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#define CCW_FLAG_SKIP 0x10
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#define CCW_FLAG_PCI 0x08
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#define CCW_FLAG_IDA 0x04
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#define CCW_FLAG_SUSPEND 0x02
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#define CCW_CMD_NOOP 0x03
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#define CCW_CMD_BASIC_SENSE 0x04
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#define CCW_CMD_TIC 0x08
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#define CCW_CMD_SENSE_ID 0xe4
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#define CCW_CMD_SET_VQ 0x13
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#define CCW_CMD_VDEV_RESET 0x33
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#define CCW_CMD_READ_FEAT 0x12
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#define CCW_CMD_WRITE_FEAT 0x11
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#define CCW_CMD_READ_CONF 0x22
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#define CCW_CMD_WRITE_CONF 0x21
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#define CCW_CMD_WRITE_STATUS 0x31
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#define CCW_CMD_SET_IND 0x43
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#define CCW_CMD_SET_CONF_IND 0x53
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#define CCW_CMD_READ_VQ_CONF 0x32
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/*
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* Command-mode operation request block
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*/
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struct cmd_orb {
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__u32 intparm; /* interruption parameter */
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__u32 key:4; /* flags, like key, suspend control, etc. */
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__u32 spnd:1; /* suspend control */
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__u32 res1:1; /* reserved */
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__u32 mod:1; /* modification control */
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__u32 sync:1; /* synchronize control */
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__u32 fmt:1; /* format control */
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__u32 pfch:1; /* prefetch control */
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__u32 isic:1; /* initial-status-interruption control */
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__u32 alcc:1; /* address-limit-checking control */
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__u32 ssic:1; /* suppress-suspended-interr. control */
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__u32 res2:1; /* reserved */
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__u32 c64:1; /* IDAW/QDIO 64 bit control */
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__u32 i2k:1; /* IDAW 2/4kB block size control */
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__u32 lpm:8; /* logical path mask */
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__u32 ils:1; /* incorrect length */
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__u32 zero:6; /* reserved zeros */
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__u32 orbx:1; /* ORB extension control */
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__u32 cpa; /* channel program address */
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} __attribute__ ((packed, aligned(4)));
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struct ciw {
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__u8 type;
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__u8 command;
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__u16 count;
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};
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/*
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* sense-id response buffer layout
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*/
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struct senseid {
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/* common part */
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__u8 reserved; /* always 0x'FF' */
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__u16 cu_type; /* control unit type */
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__u8 cu_model; /* control unit model */
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__u16 dev_type; /* device type */
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__u8 dev_model; /* device model */
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__u8 unused; /* padding byte */
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/* extended part */
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struct ciw ciw[62];
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} __attribute__ ((packed, aligned(4)));
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/* interruption response block */
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struct irb {
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struct scsw scsw;
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__u32 esw[5];
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__u32 ecw[8];
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__u32 emw[8];
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} __attribute__ ((packed, aligned(4)));
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/*
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* Some S390 specific IO instructions as inline
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*/
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static inline int stsch_err(struct subchannel_id schid, struct schib *addr)
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{
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register struct subchannel_id reg1 asm ("1") = schid;
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int ccode = -EIO;
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asm volatile(
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" stsch 0(%3)\n"
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"0: ipm %0\n"
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" srl %0,28\n"
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"1:\n"
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: "+d" (ccode), "=m" (*addr)
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: "d" (reg1), "a" (addr)
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: "cc");
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return ccode;
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}
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static inline int msch(struct subchannel_id schid, struct schib *addr)
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{
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register struct subchannel_id reg1 asm ("1") = schid;
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int ccode;
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asm volatile(
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" msch 0(%2)\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1), "a" (addr), "m" (*addr)
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: "cc");
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return ccode;
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}
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static inline int msch_err(struct subchannel_id schid, struct schib *addr)
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{
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register struct subchannel_id reg1 asm ("1") = schid;
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int ccode = -EIO;
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asm volatile(
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" msch 0(%2)\n"
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"0: ipm %0\n"
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" srl %0,28\n"
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"1:\n"
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: "+d" (ccode)
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: "d" (reg1), "a" (addr), "m" (*addr)
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: "cc");
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return ccode;
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}
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static inline int tsch(struct subchannel_id schid, struct irb *addr)
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{
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register struct subchannel_id reg1 asm ("1") = schid;
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int ccode;
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asm volatile(
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" tsch 0(%3)\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode), "=m" (*addr)
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: "d" (reg1), "a" (addr)
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: "cc");
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return ccode;
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}
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static inline int ssch(struct subchannel_id schid, struct cmd_orb *addr)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode = -EIO;
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asm volatile(
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" ssch 0(%2)\n"
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"0: ipm %0\n"
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" srl %0,28\n"
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"1:\n"
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: "+d" (ccode)
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: "d" (reg1), "a" (addr), "m" (*addr)
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: "cc", "memory");
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return ccode;
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}
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static inline int csch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" csch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc");
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return ccode;
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}
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static inline int tpi(struct tpi_info *addr)
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{
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int ccode;
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asm volatile(
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" tpi 0(%2)\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode), "=m" (*addr)
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: "a" (addr)
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: "cc");
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return ccode;
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}
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static inline int chsc(void *chsc_area)
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{
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typedef struct { char _[4096]; } addr_type;
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int cc;
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asm volatile(
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" .insn rre,0xb25f0000,%2,0\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (cc), "=m" (*(addr_type *) chsc_area)
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: "d" (chsc_area), "m" (*(addr_type *) chsc_area)
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: "cc");
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return cc;
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}
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#endif /* CIO_H */
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