mirror of
https://github.com/qemu/qemu.git
synced 2024-12-17 01:03:51 +08:00
550da1cc22
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230110082508.24038-4-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
37 lines
860 B
C
37 lines
860 B
C
/*
|
|
* ARM SBCon two-wire serial bus interface (I2C bitbang)
|
|
* a.k.a.
|
|
* ARM Versatile I2C controller
|
|
*
|
|
* Copyright (c) 2006-2007 CodeSourcery.
|
|
* Copyright (c) 2012 Oskar Andero <oskar.andero@gmail.com>
|
|
* Copyright (C) 2020 Philippe Mathieu-Daudé <f4bug@amsat.org>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0-or-later
|
|
*/
|
|
|
|
#ifndef HW_I2C_ARM_SBCON_I2C_H
|
|
#define HW_I2C_ARM_SBCON_I2C_H
|
|
|
|
#include "hw/sysbus.h"
|
|
#include "hw/i2c/bitbang_i2c.h"
|
|
#include "qom/object.h"
|
|
|
|
#define TYPE_ARM_SBCON_I2C "versatile_i2c"
|
|
|
|
typedef struct ArmSbconI2CState ArmSbconI2CState;
|
|
DECLARE_INSTANCE_CHECKER(ArmSbconI2CState, ARM_SBCON_I2C, TYPE_ARM_SBCON_I2C)
|
|
|
|
struct ArmSbconI2CState {
|
|
/*< private >*/
|
|
SysBusDevice parent_obj;
|
|
/*< public >*/
|
|
|
|
MemoryRegion iomem;
|
|
bitbang_i2c_interface bitbang;
|
|
int out;
|
|
int in;
|
|
};
|
|
|
|
#endif /* HW_I2C_ARM_SBCON_I2C_H */
|