qemu/target-arm
Juha Riihimäki a5a14945da target-arm: Simplify three-register pairwise code
Since we know that the case of (pairwise && q) has been caught
earlier, we can simplify the register setup code for each pass
in the three-register-same-size Neon loop.

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12 21:51:51 +02:00
..
cpu.h arm: basic support for ARMv4/ARMv4T emulation 2011-04-10 00:53:21 +02:00
exec.h inline cpu_halted into sole caller 2011-03-13 14:44:21 +00:00
helper.c arm: basic support for ARMv4/ARMv4T emulation 2011-04-10 00:53:21 +02:00
helpers.h target-arm: Use global env in iwmmxt_helper.c helpers 2011-04-04 20:18:07 +02:00
iwmmxt_helper.c target-arm: Use global env in iwmmxt_helper.c helpers 2011-04-04 20:18:07 +02:00
machine.c target-arm: Implement cp15 VA->PA translation 2011-03-06 23:37:18 +01:00
neon_helper.c target-arm: Make Neon helper routines use correct FP status 2011-04-04 20:18:07 +02:00
op_addsub.h target-arm: fix addsub/subadd implementation 2010-07-01 23:45:29 +02:00
op_helper.c Set the right overflow bit for neon 32 and 64 bit saturating add/sub. 2011-02-04 20:57:41 +01:00
translate.c target-arm: Simplify three-register pairwise code 2011-04-12 21:51:51 +02:00