mirror of
https://github.com/qemu/qemu.git
synced 2024-12-05 17:53:36 +08:00
669b498301
Re-implemented the interconnect between the Xilinx AXI ethernet and DMA controllers. A QOM interface "stream" is created, for the two stream interfaces. As per Edgars request, this is designed to be more generic than AXI-stream, so in the future we may see more clients of this interface beyond AXI stream. This is based primarily on Paolos original refactoring of the interconnect. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Peter A.G. Crosthwaite <peter.crosthwaite@petalogix.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
24 lines
495 B
C
24 lines
495 B
C
#include "stream.h"
|
|
|
|
void
|
|
stream_push(StreamSlave *sink, uint8_t *buf, size_t len, uint32_t *app)
|
|
{
|
|
StreamSlaveClass *k = STREAM_SLAVE_GET_CLASS(sink);
|
|
|
|
k->push(sink, buf, len, app);
|
|
}
|
|
|
|
static TypeInfo stream_slave_info = {
|
|
.name = TYPE_STREAM_SLAVE,
|
|
.parent = TYPE_INTERFACE,
|
|
.class_size = sizeof(StreamSlaveClass),
|
|
};
|
|
|
|
|
|
static void stream_slave_register_types(void)
|
|
{
|
|
type_register_static(&stream_slave_info);
|
|
}
|
|
|
|
type_init(stream_slave_register_types)
|