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932d4a42af
Added (msi|msix)_set_message() function for whoever might want to use them. Currently msi_notify()/msix_notify() write to these vectors to signal the guest about an interrupt so the correct values have to written there by the guest or QEMU. For example, POWER guest never initializes MSI/MSIX vectors, instead it uses RTAS hypercalls. So in order to support MSIX for virtio-pci on POWER we have to initialize MSI/MSIX message from QEMU. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
50 lines
1.5 KiB
C
50 lines
1.5 KiB
C
/*
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* msi.h
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*
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* Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
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* VA Linux Systems Japan K.K.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef QEMU_MSI_H
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#define QEMU_MSI_H
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#include "qemu-common.h"
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#include "pci.h"
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struct MSIMessage {
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uint64_t address;
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uint32_t data;
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};
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extern bool msi_supported;
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void msi_set_message(PCIDevice *dev, MSIMessage msg);
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bool msi_enabled(const PCIDevice *dev);
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int msi_init(struct PCIDevice *dev, uint8_t offset,
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unsigned int nr_vectors, bool msi64bit, bool msi_per_vector_mask);
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void msi_uninit(struct PCIDevice *dev);
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void msi_reset(PCIDevice *dev);
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void msi_notify(PCIDevice *dev, unsigned int vector);
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void msi_write_config(PCIDevice *dev, uint32_t addr, uint32_t val, int len);
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unsigned int msi_nr_vectors_allocated(const PCIDevice *dev);
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static inline bool msi_present(const PCIDevice *dev)
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{
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return dev->cap_present & QEMU_PCI_CAP_MSI;
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}
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#endif /* QEMU_MSI_H */
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