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aa24822bdc
When an input line is handled as level-triggered, it will immediately raise an IRQ on the output of a PIC again that goes through an init reset. So only clear the edge-triggered inputs from IRR in that scenario. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
162 lines
5.0 KiB
C
162 lines
5.0 KiB
C
/*
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* QEMU 8259 - common bits of emulated and KVM kernel model
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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* Copyright (c) 2011 Jan Kiszka, Siemens AG
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "pc.h"
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#include "i8259_internal.h"
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void pic_reset_common(PICCommonState *s)
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{
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s->last_irr = 0;
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s->irr &= s->elcr;
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s->imr = 0;
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s->isr = 0;
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s->priority_add = 0;
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s->irq_base = 0;
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s->read_reg_select = 0;
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s->poll = 0;
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s->special_mask = 0;
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s->init_state = 0;
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s->auto_eoi = 0;
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s->rotate_on_auto_eoi = 0;
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s->special_fully_nested_mode = 0;
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s->init4 = 0;
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s->single_mode = 0;
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/* Note: ELCR is not reset */
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}
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static void pic_dispatch_pre_save(void *opaque)
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{
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PICCommonState *s = opaque;
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PICCommonClass *info = PIC_COMMON_GET_CLASS(s);
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if (info->pre_save) {
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info->pre_save(s);
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}
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}
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static int pic_dispatch_post_load(void *opaque, int version_id)
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{
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PICCommonState *s = opaque;
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PICCommonClass *info = PIC_COMMON_GET_CLASS(s);
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if (info->post_load) {
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info->post_load(s);
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}
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return 0;
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}
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static int pic_init_common(ISADevice *dev)
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{
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PICCommonState *s = DO_UPCAST(PICCommonState, dev, dev);
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PICCommonClass *info = PIC_COMMON_GET_CLASS(s);
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info->init(s);
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isa_register_ioport(NULL, &s->base_io, s->iobase);
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if (s->elcr_addr != -1) {
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isa_register_ioport(NULL, &s->elcr_io, s->elcr_addr);
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}
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qdev_set_legacy_instance_id(&s->dev.qdev, s->iobase, 1);
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return 0;
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}
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ISADevice *i8259_init_chip(const char *name, ISABus *bus, bool master)
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{
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ISADevice *dev;
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dev = isa_create(bus, name);
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qdev_prop_set_uint32(&dev->qdev, "iobase", master ? 0x20 : 0xa0);
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qdev_prop_set_uint32(&dev->qdev, "elcr_addr", master ? 0x4d0 : 0x4d1);
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qdev_prop_set_uint8(&dev->qdev, "elcr_mask", master ? 0xf8 : 0xde);
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qdev_prop_set_bit(&dev->qdev, "master", master);
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qdev_init_nofail(&dev->qdev);
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return dev;
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}
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static const VMStateDescription vmstate_pic_common = {
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.name = "i8259",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.pre_save = pic_dispatch_pre_save,
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.post_load = pic_dispatch_post_load,
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.fields = (VMStateField[]) {
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VMSTATE_UINT8(last_irr, PICCommonState),
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VMSTATE_UINT8(irr, PICCommonState),
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VMSTATE_UINT8(imr, PICCommonState),
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VMSTATE_UINT8(isr, PICCommonState),
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VMSTATE_UINT8(priority_add, PICCommonState),
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VMSTATE_UINT8(irq_base, PICCommonState),
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VMSTATE_UINT8(read_reg_select, PICCommonState),
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VMSTATE_UINT8(poll, PICCommonState),
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VMSTATE_UINT8(special_mask, PICCommonState),
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VMSTATE_UINT8(init_state, PICCommonState),
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VMSTATE_UINT8(auto_eoi, PICCommonState),
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VMSTATE_UINT8(rotate_on_auto_eoi, PICCommonState),
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VMSTATE_UINT8(special_fully_nested_mode, PICCommonState),
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VMSTATE_UINT8(init4, PICCommonState),
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VMSTATE_UINT8(single_mode, PICCommonState),
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VMSTATE_UINT8(elcr, PICCommonState),
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VMSTATE_END_OF_LIST()
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}
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};
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static Property pic_properties_common[] = {
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DEFINE_PROP_HEX32("iobase", PICCommonState, iobase, -1),
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DEFINE_PROP_HEX32("elcr_addr", PICCommonState, elcr_addr, -1),
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DEFINE_PROP_HEX8("elcr_mask", PICCommonState, elcr_mask, -1),
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DEFINE_PROP_BIT("master", PICCommonState, master, 0, false),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void pic_common_class_init(ObjectClass *klass, void *data)
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{
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ISADeviceClass *ic = ISA_DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->vmsd = &vmstate_pic_common;
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dc->no_user = 1;
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dc->props = pic_properties_common;
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ic->init = pic_init_common;
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}
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static TypeInfo pic_common_type = {
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.name = TYPE_PIC_COMMON,
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.parent = TYPE_ISA_DEVICE,
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.instance_size = sizeof(PICCommonState),
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.class_size = sizeof(PICCommonClass),
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.class_init = pic_common_class_init,
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.abstract = true,
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};
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static void register_types(void)
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{
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type_register_static(&pic_common_type);
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}
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type_init(register_types);
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