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d2ad50210b
target_phys_addr_t has been already replaced by hwaddr, but this one is introduced after. Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
175 lines
4.1 KiB
C
175 lines
4.1 KiB
C
/*
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* Moxie helper routines.
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*
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* Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdio.h>
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#include <string.h>
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#include <assert.h>
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#include "config.h"
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#include "cpu.h"
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#include "mmu.h"
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#include "exec/exec-all.h"
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#include "qemu/host-utils.h"
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#include "helper.h"
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#define MMUSUFFIX _mmu
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#define SHIFT 0
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#include "exec/softmmu_template.h"
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#define SHIFT 1
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#include "exec/softmmu_template.h"
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#define SHIFT 2
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#include "exec/softmmu_template.h"
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#define SHIFT 3
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#include "exec/softmmu_template.h"
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/* Try to fill the TLB and return an exception if error. If retaddr is
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NULL, it means that the function was called in C code (i.e. not
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from generated code or from helper.c) */
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void tlb_fill(CPUMoxieState *env, target_ulong addr, int is_write, int mmu_idx,
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uintptr_t retaddr)
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{
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int ret;
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ret = cpu_moxie_handle_mmu_fault(env, addr, is_write, mmu_idx);
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if (unlikely(ret)) {
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if (retaddr) {
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cpu_restore_state(env, retaddr);
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}
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}
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cpu_loop_exit(env);
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}
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void helper_raise_exception(CPUMoxieState *env, int ex)
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{
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env->exception_index = ex;
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/* Stash the exception type. */
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env->sregs[2] = ex;
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/* Stash the address where the exception occurred. */
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cpu_restore_state(env, GETPC());
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env->sregs[5] = env->pc;
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/* Jump the the exception handline routine. */
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env->pc = env->sregs[1];
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cpu_loop_exit(env);
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}
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uint32_t helper_div(CPUMoxieState *env, uint32_t a, uint32_t b)
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{
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if (unlikely(b == 0)) {
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helper_raise_exception(env, MOXIE_EX_DIV0);
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return 0;
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}
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if (unlikely(a == INT_MIN && b == -1)) {
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return INT_MIN;
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}
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return (int32_t)a / (int32_t)b;
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}
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uint32_t helper_udiv(CPUMoxieState *env, uint32_t a, uint32_t b)
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{
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if (unlikely(b == 0)) {
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helper_raise_exception(env, MOXIE_EX_DIV0);
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return 0;
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}
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return a / b;
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}
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void helper_debug(CPUMoxieState *env)
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{
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env->exception_index = EXCP_DEBUG;
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cpu_loop_exit(env);
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}
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#if defined(CONFIG_USER_ONLY)
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void moxie_cpu_do_interrupt(CPUState *env)
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{
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env->exception_index = -1;
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}
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int cpu_moxie_handle_mmu_fault(CPUMoxieState *env, target_ulong address,
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int rw, int mmu_idx)
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{
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env->exception_index = 0xaa;
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env->debug1 = address;
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cpu_dump_state(env, stderr, fprintf, 0);
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return 1;
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}
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hwaddr cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
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{
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return addr;
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}
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#else /* !CONFIG_USER_ONLY */
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int cpu_moxie_handle_mmu_fault(CPUMoxieState *env, target_ulong address,
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int rw, int mmu_idx)
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{
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MoxieMMUResult res;
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int prot, miss;
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target_ulong phy;
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int r = 1;
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address &= TARGET_PAGE_MASK;
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prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
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miss = moxie_mmu_translate(&res, env, address, rw, mmu_idx);
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if (miss) {
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/* handle the miss. */
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phy = 0;
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env->exception_index = MOXIE_EX_MMU_MISS;
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} else {
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phy = res.phy;
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r = 0;
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}
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tlb_set_page(env, address, phy, prot, mmu_idx, TARGET_PAGE_SIZE);
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return r;
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}
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void moxie_cpu_do_interrupt(CPUState *cs)
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{
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MoxieCPU *cpu = MOXIE_CPU(cs);
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CPUMoxieState *env = &cpu->env;
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switch (env->exception_index) {
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case MOXIE_EX_BREAK:
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break;
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default:
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break;
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}
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}
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hwaddr cpu_get_phys_page_debug(CPUMoxieState *env, target_ulong addr)
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{
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uint32_t phy = addr;
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MoxieMMUResult res;
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int miss;
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miss = moxie_mmu_translate(&res, env, addr, 0, 0);
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if (!miss) {
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phy = res.phy;
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}
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return phy;
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}
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#endif
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