Laurent Vivier 98670d47cd accel/tcg: add size paremeter in tlb_fill() ... The MC68040 MMU provides the size of the access that triggers the page fault. This size is set in the Special Status Word which is written in the stack frame of the access fault exception. So we need the size in m68k_cpu_unassigned_access() and m68k_cpu_handle_mmu_fault(). To be able to do that, this patch modifies the prototype of handle_mmu_fault handler, tlb_fill() and probe_write(). do_unassigned_access() already includes a size parameter. This patch also updates handle_mmu_fault handlers and tlb_fill() of all targets (only parameter, no code change). Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-2-laurent@vivier.eu>		2018-01-25 16:02:24 +01:00
..
translate	target/ppc: optimize various functions using extract op	2017-07-19 14:45:16 -07:00
arch_dump.c	exec,dump,i386,ppc,s390x: don't include exec/cpu-all.h explicitly	2017-09-19 18:21:33 +02:00
compat.c	target/ppc: Clarify compat mode max_threads value	2018-01-17 09:35:24 +11:00
cpu-models.c	target/ppc: Add POWER9 DD2.0 model information	2017-10-17 10:34:00 +11:00
cpu-models.h	target/ppc: Add POWER9 DD2.0 model information	2017-10-17 10:34:00 +11:00
cpu-qom.h	pcc: define the Power-saving mode Exit Cause Enable bits in PowerPCCPUClass	2017-12-15 09:49:23 +11:00
cpu.c	target/ppc: support for 32-bit carry and overflow	2017-03-01 11:23:39 +11:00
cpu.h	accel/tcg: add size paremeter in tlb_fill()	2018-01-25 16:02:24 +01:00
dfp_helper.c
excp_helper.c	target/ppc: add support for hypervisor doorbells on book3s CPUs	2018-01-20 17:15:05 +11:00
fpu_helper.c	target/ppc: use helper for excp handling	2017-03-06 13:17:28 +11:00
gdbstub.c
helper_regs.h	target/ppc: Fix system lockups caused by interrupt_request state corruption	2017-12-05 12:28:42 +11:00
helper.h	target/ppc: add support for hypervisor doorbells on book3s CPUs	2018-01-20 17:15:05 +11:00
int_helper.c	target/ppc: more use of the PPC_*() macros	2018-01-10 12:53:00 +11:00
internal.h	target-ppc: implement load atomic instruction	2017-02-22 11:28:27 +11:00
kvm_ppc.h	target/ppc: Clean up probing of VMX, VSX and DFP availability on KVM	2018-01-17 09:35:24 +11:00
kvm-stub.c
kvm.c	target/ppc: Clean up probing of VMX, VSX and DFP availability on KVM	2018-01-17 09:35:24 +11:00
machine.c	target-ppc: Don't invalidate non-supported msr bits	2017-11-30 14:56:42 +11:00
Makefile.objs	build: remove CONFIG_LIBDECNUMBER	2017-10-16 18:03:52 +02:00
mem_helper.c	ppc: use DIV_ROUND_UP	2017-08-31 12:29:07 +02:00
mfrom_table_gen.c
mfrom_table.c
misc_helper.c	target/ppc: Flush TLB on write to PIDR	2017-04-26 12:41:56 +10:00
mmu_helper.c	accel/tcg: add size paremeter in tlb_fill()	2018-01-25 16:02:24 +01:00
mmu-book3s-v3.c	target/ppc: Implement ISA V3.00 radix page fault handler	2017-05-11 09:45:15 +10:00
mmu-book3s-v3.h	target/ppc: Implement ISA V3.00 radix page fault handler	2017-05-11 09:45:15 +10:00
mmu-hash32.c	target/ppc: Eliminate htab_base and htab_mask variables	2017-03-01 11:23:39 +11:00
mmu-hash32.h	target/ppc: Manage external HPT via virtual hypervisor	2017-03-01 11:23:39 +11:00
mmu-hash64.c	spapr: Small cleanup of PPC MMU enums	2017-03-03 11:30:59 +11:00
mmu-hash64.h	pseries: Implement HPT resizing	2017-07-17 15:07:05 +10:00
mmu-radix64.c	target/ppc: Add debug function for radix mmu translation	2017-07-11 11:04:02 +10:00
mmu-radix64.h	target/ppc: Add debug function for radix mmu translation	2017-07-11 11:04:02 +10:00
monitor.c	Use qemu_tolower() and qemu_toupper(), not tolower() and toupper()	2017-07-21 10:32:41 +01:00
timebase_helper.c
trace-events	docs: fix broken paths to docs/devel/tracing.txt	2017-07-31 13:12:53 +03:00
translate_init.c	target/ppc: add support for hypervisor doorbells on book3s CPUs	2018-01-20 17:15:05 +11:00
translate.c	target/ppc: add support for hypervisor doorbells on book3s CPUs	2018-01-20 17:15:05 +11:00
user_only_helper.c	accel/tcg: add size paremeter in tlb_fill()	2018-01-25 16:02:24 +01:00