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dcdbfaafe9
The code uses the isa_serial_io array to figure what the device uid is. Side effect is that acpi antries are not limited to port 1+2 any more, we'll also get entries for ports 3+4. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200515150421.25479-6-kraxel@redhat.com>
183 lines
5.5 KiB
C
183 lines
5.5 KiB
C
/*
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* QEMU 16550A UART emulation
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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* Copyright (c) 2008 Citrix Systems, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qemu/module.h"
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#include "sysemu/sysemu.h"
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#include "hw/acpi/aml-build.h"
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#include "hw/char/serial.h"
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#include "hw/isa/isa.h"
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#include "hw/qdev-properties.h"
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#include "migration/vmstate.h"
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#define ISA_SERIAL(obj) OBJECT_CHECK(ISASerialState, (obj), TYPE_ISA_SERIAL)
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typedef struct ISASerialState {
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ISADevice parent_obj;
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uint32_t index;
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uint32_t iobase;
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uint32_t isairq;
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SerialState state;
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} ISASerialState;
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static const int isa_serial_io[MAX_ISA_SERIAL_PORTS] = {
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0x3f8, 0x2f8, 0x3e8, 0x2e8
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};
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static const int isa_serial_irq[MAX_ISA_SERIAL_PORTS] = {
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4, 3, 4, 3
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};
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static void serial_isa_realizefn(DeviceState *dev, Error **errp)
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{
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static int index;
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ISADevice *isadev = ISA_DEVICE(dev);
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ISASerialState *isa = ISA_SERIAL(dev);
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SerialState *s = &isa->state;
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if (isa->index == -1) {
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isa->index = index;
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}
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if (isa->index >= MAX_ISA_SERIAL_PORTS) {
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error_setg(errp, "Max. supported number of ISA serial ports is %d.",
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MAX_ISA_SERIAL_PORTS);
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return;
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}
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if (isa->iobase == -1) {
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isa->iobase = isa_serial_io[isa->index];
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}
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if (isa->isairq == -1) {
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isa->isairq = isa_serial_irq[isa->index];
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}
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index++;
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isa_init_irq(isadev, &s->irq, isa->isairq);
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object_property_set_bool(OBJECT(s), true, "realized", errp);
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qdev_set_legacy_instance_id(dev, isa->iobase, 3);
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memory_region_init_io(&s->io, OBJECT(isa), &serial_io_ops, s, "serial", 8);
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isa_register_ioport(isadev, &s->io, isa->iobase);
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}
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static void serial_isa_build_aml(ISADevice *isadev, Aml *scope)
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{
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ISASerialState *isa = ISA_SERIAL(isadev);
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Aml *dev;
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Aml *crs;
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crs = aml_resource_template();
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aml_append(crs, aml_io(AML_DECODE16, isa->iobase, isa->iobase, 0x00, 0x08));
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aml_append(crs, aml_irq_no_flags(isa->isairq));
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dev = aml_device("COM%d", isa->index + 1);
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aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0501")));
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aml_append(dev, aml_name_decl("_UID", aml_int(isa->index + 1)));
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aml_append(dev, aml_name_decl("_STA", aml_int(0xf)));
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aml_append(dev, aml_name_decl("_CRS", crs));
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aml_append(scope, dev);
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}
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static const VMStateDescription vmstate_isa_serial = {
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.name = "serial",
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.version_id = 3,
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.minimum_version_id = 2,
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.fields = (VMStateField[]) {
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VMSTATE_STRUCT(state, ISASerialState, 0, vmstate_serial, SerialState),
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VMSTATE_END_OF_LIST()
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}
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};
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static Property serial_isa_properties[] = {
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DEFINE_PROP_UINT32("index", ISASerialState, index, -1),
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DEFINE_PROP_UINT32("iobase", ISASerialState, iobase, -1),
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DEFINE_PROP_UINT32("irq", ISASerialState, isairq, -1),
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DEFINE_PROP_CHR("chardev", ISASerialState, state.chr),
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DEFINE_PROP_UINT32("wakeup", ISASerialState, state.wakeup, 0),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void serial_isa_class_initfn(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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ISADeviceClass *isa = ISA_DEVICE_CLASS(klass);
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dc->realize = serial_isa_realizefn;
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dc->vmsd = &vmstate_isa_serial;
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isa->build_aml = serial_isa_build_aml;
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device_class_set_props(dc, serial_isa_properties);
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set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
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}
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static void serial_isa_initfn(Object *o)
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{
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ISASerialState *self = ISA_SERIAL(o);
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object_initialize_child(o, "serial", &self->state, sizeof(self->state),
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TYPE_SERIAL, &error_abort, NULL);
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}
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static const TypeInfo serial_isa_info = {
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.name = TYPE_ISA_SERIAL,
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.parent = TYPE_ISA_DEVICE,
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.instance_size = sizeof(ISASerialState),
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.instance_init = serial_isa_initfn,
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.class_init = serial_isa_class_initfn,
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};
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static void serial_register_types(void)
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{
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type_register_static(&serial_isa_info);
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}
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type_init(serial_register_types)
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static void serial_isa_init(ISABus *bus, int index, Chardev *chr)
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{
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DeviceState *dev;
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ISADevice *isadev;
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isadev = isa_create(bus, TYPE_ISA_SERIAL);
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dev = DEVICE(isadev);
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qdev_prop_set_uint32(dev, "index", index);
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qdev_prop_set_chr(dev, "chardev", chr);
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qdev_init_nofail(dev);
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}
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void serial_hds_isa_init(ISABus *bus, int from, int to)
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{
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int i;
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assert(from >= 0);
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assert(to <= MAX_ISA_SERIAL_PORTS);
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for (i = from; i < to; ++i) {
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if (serial_hd(i)) {
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serial_isa_init(bus, i, serial_hd(i));
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}
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}
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}
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