qemu/target
James Hogan 9658e4c342 target/mips: Weaken TLB flush on UX,SX,KX,ASID changes
There is no need to invalidate any shadow TLB entries when the ASID
changes or when access to one of the 64-bit segments has been disabled,
since doing so doesn't reveal to software whether any TLB entries have
been evicted into the shadow half of the TLB.

Therefore weaken the tlb flushes in these cases to only flush the QEMU
TLB.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Yongbok Kim <yongbok.kim@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
2017-07-20 22:42:26 +01:00
..
alpha tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
arm tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
cris tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
hppa tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
i386 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
lm32 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
m68k tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
microblaze tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
mips target/mips: Weaken TLB flush on UX,SX,KX,ASID changes 2017-07-20 22:42:26 +01:00
moxie tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
nios2 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
openrisc tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
ppc tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
s390x tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
sh4 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
sparc tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
tilegx tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
tricore tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
unicore32 tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00
xtensa tcg: Pass generic CPUState to gen_intermediate_code() 2017-07-19 14:45:16 -07:00