Luc MICHEL 95e9a242e2 target/arm: add data cache invalidation cp15 instruction to cortex-r5 ... The cp15, CRn=15, opc1=0, CRm=5, opc2=0 instruction invalidates all the data cache on the cortex-r5. Implementing it as a NOP. Signed-off-by: Luc MICHEL <luc.michel@git.antfield.fr> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>		2017-06-04 18:42:55 +03:00
..
arch_dump.c
arm_ldst.h	Fix Thumb-1 BE32 execution and disassembly.	2017-02-07 18:29:59 +00:00
arm-powerctl.c	target-arm/powerctl: defer cpu reset work to CPU context	2017-02-24 10:32:46 +00:00
arm-powerctl.h	target-arm/powerctl: defer cpu reset work to CPU context	2017-02-24 10:32:46 +00:00
arm-semi.c
cpu64.c	target-arm: Enable EL2 feature bit on A53 and A57	2017-01-20 11:15:10 +00:00
cpu-qom.h
cpu.c	target/arm: add data cache invalidation cp15 instruction to cortex-r5	2017-06-04 18:42:55 +03:00
cpu.h	arm: Implement HFNMIENA support for M profile MPU	2017-06-02 11:51:49 +01:00
crypto_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c	target-arm: Use clrsb helper	2017-01-10 08:47:48 -08:00
helper-a64.h	target-arm: Use clrsb helper	2017-01-10 08:47:48 -08:00
helper.c	arm: Implement HFNMIENA support for M profile MPU	2017-06-02 11:51:49 +01:00
helper.h	target-arm: Use clz opcode	2017-01-10 08:06:11 -08:00
internals.h	arm: Move excnames[] array into arm_log_exceptions()	2017-04-20 17:39:17 +01:00
iwmmxt_helper.c
kvm32.c
kvm64.c	arm/kvm: Remove trailing newlines from error_report()	2017-04-20 17:39:17 +01:00
kvm_arm.h
kvm-consts.h	arm: add trailing ; after MISMATCH_CHECK	2017-02-01 03:37:18 +02:00
kvm-stub.c
kvm.c	KVM: do not use sigtimedwait to catch SIGBUS	2017-03-03 16:40:02 +01:00
machine.c	arm: add MPU support to M profile CPUs	2017-06-02 11:51:48 +01:00
Makefile.objs
monitor.c
neon_helper.c
op_addsub.h
op_helper.c	arm: Add support for M profile CPUs having different MMU index semantics	2017-06-02 11:51:47 +01:00
psci.c	shutdown: Add source information to SHUTDOWN and RESET	2017-05-23 13:28:17 +02:00
trace-events
translate-a64.c	arm: Add support for M profile CPUs having different MMU index semantics	2017-06-02 11:51:47 +01:00
translate.c	arm: Implement HFNMIENA support for M profile MPU	2017-06-02 11:51:49 +01:00
translate.h	arm: Add support for M profile CPUs having different MMU index semantics	2017-06-02 11:51:47 +01:00