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73e5716c89
Scripted conversion: sed -i "s/CPUState/CPUSH4State/g" target-sh4/*.[hc] sed -i "s/#define CPUSH4State/#define CPUState/" target-sh4/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
754 lines
16 KiB
C
754 lines
16 KiB
C
/*
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* SH4 emulation
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*
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* Copyright (c) 2005 Samuel Tardieu
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include <assert.h>
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#include <stdlib.h>
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#include "cpu.h"
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#include "dyngen-exec.h"
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#include "helper.h"
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static void cpu_restore_state_from_retaddr(void *retaddr)
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{
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TranslationBlock *tb;
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unsigned long pc;
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if (retaddr) {
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pc = (unsigned long) retaddr;
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tb = tb_find_pc(pc);
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if (tb) {
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/* the PC is inside the translated code. It means that we have
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a virtual CPU fault */
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cpu_restore_state(tb, env, pc);
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}
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}
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}
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#ifndef CONFIG_USER_ONLY
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#include "softmmu_exec.h"
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#define MMUSUFFIX _mmu
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#define SHIFT 0
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#include "softmmu_template.h"
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#define SHIFT 1
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#include "softmmu_template.h"
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#define SHIFT 2
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#include "softmmu_template.h"
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#define SHIFT 3
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#include "softmmu_template.h"
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void tlb_fill(CPUSH4State *env1, target_ulong addr, int is_write, int mmu_idx,
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void *retaddr)
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{
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CPUSH4State *saved_env;
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int ret;
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saved_env = env;
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env = env1;
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ret = cpu_sh4_handle_mmu_fault(env, addr, is_write, mmu_idx);
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if (ret) {
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/* now we have a real cpu fault */
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cpu_restore_state_from_retaddr(retaddr);
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cpu_loop_exit(env);
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}
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env = saved_env;
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}
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#endif
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void helper_ldtlb(void)
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{
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#ifdef CONFIG_USER_ONLY
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/* XXXXX */
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cpu_abort(env, "Unhandled ldtlb");
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#else
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cpu_load_tlb(env);
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#endif
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}
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static inline void raise_exception(int index, void *retaddr)
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{
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env->exception_index = index;
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cpu_restore_state_from_retaddr(retaddr);
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cpu_loop_exit(env);
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}
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void helper_raise_illegal_instruction(void)
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{
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raise_exception(0x180, GETPC());
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}
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void helper_raise_slot_illegal_instruction(void)
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{
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raise_exception(0x1a0, GETPC());
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}
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void helper_raise_fpu_disable(void)
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{
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raise_exception(0x800, GETPC());
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}
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void helper_raise_slot_fpu_disable(void)
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{
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raise_exception(0x820, GETPC());
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}
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void helper_debug(void)
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{
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env->exception_index = EXCP_DEBUG;
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cpu_loop_exit(env);
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}
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void helper_sleep(uint32_t next_pc)
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{
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env->halted = 1;
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env->in_sleep = 1;
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env->exception_index = EXCP_HLT;
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env->pc = next_pc;
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cpu_loop_exit(env);
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}
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void helper_trapa(uint32_t tra)
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{
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env->tra = tra << 2;
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raise_exception(0x160, GETPC());
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}
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void helper_movcal(uint32_t address, uint32_t value)
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{
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if (cpu_sh4_is_cached (env, address))
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{
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memory_content *r = malloc (sizeof(memory_content));
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r->address = address;
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r->value = value;
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r->next = NULL;
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*(env->movcal_backup_tail) = r;
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env->movcal_backup_tail = &(r->next);
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}
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}
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void helper_discard_movcal_backup(void)
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{
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memory_content *current = env->movcal_backup;
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while(current)
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{
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memory_content *next = current->next;
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free (current);
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env->movcal_backup = current = next;
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if (current == NULL)
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env->movcal_backup_tail = &(env->movcal_backup);
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}
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}
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void helper_ocbi(uint32_t address)
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{
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memory_content **current = &(env->movcal_backup);
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while (*current)
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{
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uint32_t a = (*current)->address;
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if ((a & ~0x1F) == (address & ~0x1F))
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{
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memory_content *next = (*current)->next;
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stl(a, (*current)->value);
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if (next == NULL)
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{
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env->movcal_backup_tail = current;
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}
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free (*current);
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*current = next;
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break;
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}
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}
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}
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uint32_t helper_addc(uint32_t arg0, uint32_t arg1)
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{
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uint32_t tmp0, tmp1;
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tmp1 = arg0 + arg1;
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tmp0 = arg1;
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arg1 = tmp1 + (env->sr & 1);
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if (tmp0 > tmp1)
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env->sr |= SR_T;
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else
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env->sr &= ~SR_T;
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if (tmp1 > arg1)
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env->sr |= SR_T;
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return arg1;
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}
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uint32_t helper_addv(uint32_t arg0, uint32_t arg1)
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{
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uint32_t dest, src, ans;
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if ((int32_t) arg1 >= 0)
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dest = 0;
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else
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dest = 1;
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if ((int32_t) arg0 >= 0)
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src = 0;
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else
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src = 1;
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src += dest;
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arg1 += arg0;
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if ((int32_t) arg1 >= 0)
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ans = 0;
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else
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ans = 1;
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ans += dest;
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if (src == 0 || src == 2) {
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if (ans == 1)
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env->sr |= SR_T;
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else
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env->sr &= ~SR_T;
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} else
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env->sr &= ~SR_T;
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return arg1;
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}
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#define T (env->sr & SR_T)
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#define Q (env->sr & SR_Q ? 1 : 0)
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#define M (env->sr & SR_M ? 1 : 0)
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#define SETT env->sr |= SR_T
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#define CLRT env->sr &= ~SR_T
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#define SETQ env->sr |= SR_Q
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#define CLRQ env->sr &= ~SR_Q
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#define SETM env->sr |= SR_M
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#define CLRM env->sr &= ~SR_M
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uint32_t helper_div1(uint32_t arg0, uint32_t arg1)
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{
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uint32_t tmp0, tmp2;
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uint8_t old_q, tmp1 = 0xff;
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//printf("div1 arg0=0x%08x arg1=0x%08x M=%d Q=%d T=%d\n", arg0, arg1, M, Q, T);
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old_q = Q;
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if ((0x80000000 & arg1) != 0)
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SETQ;
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else
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CLRQ;
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tmp2 = arg0;
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arg1 <<= 1;
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arg1 |= T;
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switch (old_q) {
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case 0:
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switch (M) {
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case 0:
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tmp0 = arg1;
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arg1 -= tmp2;
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tmp1 = arg1 > tmp0;
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switch (Q) {
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case 0:
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if (tmp1)
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SETQ;
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else
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CLRQ;
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break;
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case 1:
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if (tmp1 == 0)
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SETQ;
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else
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CLRQ;
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break;
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}
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break;
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case 1:
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tmp0 = arg1;
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arg1 += tmp2;
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tmp1 = arg1 < tmp0;
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switch (Q) {
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case 0:
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if (tmp1 == 0)
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SETQ;
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else
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CLRQ;
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break;
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case 1:
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if (tmp1)
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SETQ;
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else
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CLRQ;
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break;
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}
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break;
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}
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break;
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case 1:
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switch (M) {
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case 0:
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tmp0 = arg1;
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arg1 += tmp2;
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tmp1 = arg1 < tmp0;
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switch (Q) {
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case 0:
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if (tmp1)
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SETQ;
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else
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CLRQ;
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break;
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case 1:
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if (tmp1 == 0)
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SETQ;
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else
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CLRQ;
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break;
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}
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break;
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case 1:
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tmp0 = arg1;
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arg1 -= tmp2;
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tmp1 = arg1 > tmp0;
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switch (Q) {
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case 0:
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if (tmp1 == 0)
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SETQ;
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else
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CLRQ;
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break;
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case 1:
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if (tmp1)
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SETQ;
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else
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CLRQ;
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break;
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}
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break;
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}
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break;
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}
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if (Q == M)
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SETT;
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else
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CLRT;
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//printf("Output: arg1=0x%08x M=%d Q=%d T=%d\n", arg1, M, Q, T);
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return arg1;
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}
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void helper_macl(uint32_t arg0, uint32_t arg1)
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{
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int64_t res;
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res = ((uint64_t) env->mach << 32) | env->macl;
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res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1;
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env->mach = (res >> 32) & 0xffffffff;
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env->macl = res & 0xffffffff;
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if (env->sr & SR_S) {
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if (res < 0)
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env->mach |= 0xffff0000;
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else
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env->mach &= 0x00007fff;
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}
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}
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void helper_macw(uint32_t arg0, uint32_t arg1)
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{
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int64_t res;
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res = ((uint64_t) env->mach << 32) | env->macl;
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res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1;
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env->mach = (res >> 32) & 0xffffffff;
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env->macl = res & 0xffffffff;
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if (env->sr & SR_S) {
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if (res < -0x80000000) {
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env->mach = 1;
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env->macl = 0x80000000;
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} else if (res > 0x000000007fffffff) {
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env->mach = 1;
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env->macl = 0x7fffffff;
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}
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}
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}
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uint32_t helper_subc(uint32_t arg0, uint32_t arg1)
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{
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uint32_t tmp0, tmp1;
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tmp1 = arg1 - arg0;
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tmp0 = arg1;
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arg1 = tmp1 - (env->sr & SR_T);
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if (tmp0 < tmp1)
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env->sr |= SR_T;
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else
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env->sr &= ~SR_T;
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if (tmp1 < arg1)
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env->sr |= SR_T;
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return arg1;
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}
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uint32_t helper_subv(uint32_t arg0, uint32_t arg1)
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{
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int32_t dest, src, ans;
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if ((int32_t) arg1 >= 0)
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dest = 0;
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else
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dest = 1;
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if ((int32_t) arg0 >= 0)
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src = 0;
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else
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src = 1;
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src += dest;
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arg1 -= arg0;
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if ((int32_t) arg1 >= 0)
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ans = 0;
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else
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ans = 1;
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ans += dest;
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if (src == 1) {
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if (ans == 1)
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env->sr |= SR_T;
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else
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env->sr &= ~SR_T;
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} else
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env->sr &= ~SR_T;
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return arg1;
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}
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static inline void set_t(void)
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{
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env->sr |= SR_T;
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}
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static inline void clr_t(void)
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{
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env->sr &= ~SR_T;
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}
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void helper_ld_fpscr(uint32_t val)
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{
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env->fpscr = val & FPSCR_MASK;
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if ((val & FPSCR_RM_MASK) == FPSCR_RM_ZERO) {
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set_float_rounding_mode(float_round_to_zero, &env->fp_status);
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} else {
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set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
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}
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set_flush_to_zero((val & FPSCR_DN) != 0, &env->fp_status);
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}
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static void update_fpscr(void *retaddr)
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{
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int xcpt, cause, enable;
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xcpt = get_float_exception_flags(&env->fp_status);
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/* Clear the flag entries */
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env->fpscr &= ~FPSCR_FLAG_MASK;
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if (unlikely(xcpt)) {
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if (xcpt & float_flag_invalid) {
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env->fpscr |= FPSCR_FLAG_V;
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}
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if (xcpt & float_flag_divbyzero) {
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env->fpscr |= FPSCR_FLAG_Z;
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}
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if (xcpt & float_flag_overflow) {
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env->fpscr |= FPSCR_FLAG_O;
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}
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if (xcpt & float_flag_underflow) {
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env->fpscr |= FPSCR_FLAG_U;
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}
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if (xcpt & float_flag_inexact) {
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env->fpscr |= FPSCR_FLAG_I;
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}
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/* Accumulate in cause entries */
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env->fpscr |= (env->fpscr & FPSCR_FLAG_MASK)
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<< (FPSCR_CAUSE_SHIFT - FPSCR_FLAG_SHIFT);
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/* Generate an exception if enabled */
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cause = (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT;
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enable = (env->fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT;
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if (cause & enable) {
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cpu_restore_state_from_retaddr(retaddr);
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env->exception_index = 0x120;
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cpu_loop_exit(env);
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}
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}
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}
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float32 helper_fabs_FT(float32 t0)
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{
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return float32_abs(t0);
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}
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float64 helper_fabs_DT(float64 t0)
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{
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return float64_abs(t0);
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}
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float32 helper_fadd_FT(float32 t0, float32 t1)
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{
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set_float_exception_flags(0, &env->fp_status);
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t0 = float32_add(t0, t1, &env->fp_status);
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update_fpscr(GETPC());
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return t0;
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}
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float64 helper_fadd_DT(float64 t0, float64 t1)
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{
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set_float_exception_flags(0, &env->fp_status);
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t0 = float64_add(t0, t1, &env->fp_status);
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update_fpscr(GETPC());
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return t0;
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}
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void helper_fcmp_eq_FT(float32 t0, float32 t1)
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{
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int relation;
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set_float_exception_flags(0, &env->fp_status);
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relation = float32_compare(t0, t1, &env->fp_status);
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if (unlikely(relation == float_relation_unordered)) {
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update_fpscr(GETPC());
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} else if (relation == float_relation_equal) {
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set_t();
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} else {
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clr_t();
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}
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}
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void helper_fcmp_eq_DT(float64 t0, float64 t1)
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{
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int relation;
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set_float_exception_flags(0, &env->fp_status);
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relation = float64_compare(t0, t1, &env->fp_status);
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if (unlikely(relation == float_relation_unordered)) {
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update_fpscr(GETPC());
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} else if (relation == float_relation_equal) {
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set_t();
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} else {
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clr_t();
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}
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}
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void helper_fcmp_gt_FT(float32 t0, float32 t1)
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{
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int relation;
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set_float_exception_flags(0, &env->fp_status);
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relation = float32_compare(t0, t1, &env->fp_status);
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if (unlikely(relation == float_relation_unordered)) {
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update_fpscr(GETPC());
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} else if (relation == float_relation_greater) {
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set_t();
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} else {
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clr_t();
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}
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}
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void helper_fcmp_gt_DT(float64 t0, float64 t1)
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|
{
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int relation;
|
|
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set_float_exception_flags(0, &env->fp_status);
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relation = float64_compare(t0, t1, &env->fp_status);
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if (unlikely(relation == float_relation_unordered)) {
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update_fpscr(GETPC());
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} else if (relation == float_relation_greater) {
|
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set_t();
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} else {
|
|
clr_t();
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}
|
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}
|
|
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float64 helper_fcnvsd_FT_DT(float32 t0)
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|
{
|
|
float64 ret;
|
|
set_float_exception_flags(0, &env->fp_status);
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|
ret = float32_to_float64(t0, &env->fp_status);
|
|
update_fpscr(GETPC());
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|
return ret;
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|
}
|
|
|
|
float32 helper_fcnvds_DT_FT(float64 t0)
|
|
{
|
|
float32 ret;
|
|
set_float_exception_flags(0, &env->fp_status);
|
|
ret = float64_to_float32(t0, &env->fp_status);
|
|
update_fpscr(GETPC());
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|
return ret;
|
|
}
|
|
|
|
float32 helper_fdiv_FT(float32 t0, float32 t1)
|
|
{
|
|
set_float_exception_flags(0, &env->fp_status);
|
|
t0 = float32_div(t0, t1, &env->fp_status);
|
|
update_fpscr(GETPC());
|
|
return t0;
|
|
}
|
|
|
|
float64 helper_fdiv_DT(float64 t0, float64 t1)
|
|
{
|
|
set_float_exception_flags(0, &env->fp_status);
|
|
t0 = float64_div(t0, t1, &env->fp_status);
|
|
update_fpscr(GETPC());
|
|
return t0;
|
|
}
|
|
|
|
float32 helper_float_FT(uint32_t t0)
|
|
{
|
|
float32 ret;
|
|
set_float_exception_flags(0, &env->fp_status);
|
|
ret = int32_to_float32(t0, &env->fp_status);
|
|
update_fpscr(GETPC());
|
|
return ret;
|
|
}
|
|
|
|
float64 helper_float_DT(uint32_t t0)
|
|
{
|
|
float64 ret;
|
|
set_float_exception_flags(0, &env->fp_status);
|
|
ret = int32_to_float64(t0, &env->fp_status);
|
|
update_fpscr(GETPC());
|
|
return ret;
|
|
}
|
|
|
|
float32 helper_fmac_FT(float32 t0, float32 t1, float32 t2)
|
|
{
|
|
set_float_exception_flags(0, &env->fp_status);
|
|
t0 = float32_mul(t0, t1, &env->fp_status);
|
|
t0 = float32_add(t0, t2, &env->fp_status);
|
|
update_fpscr(GETPC());
|
|
return t0;
|
|
}
|
|
|
|
float32 helper_fmul_FT(float32 t0, float32 t1)
|
|
{
|
|
set_float_exception_flags(0, &env->fp_status);
|
|
t0 = float32_mul(t0, t1, &env->fp_status);
|
|
update_fpscr(GETPC());
|
|
return t0;
|
|
}
|
|
|
|
float64 helper_fmul_DT(float64 t0, float64 t1)
|
|
{
|
|
set_float_exception_flags(0, &env->fp_status);
|
|
t0 = float64_mul(t0, t1, &env->fp_status);
|
|
update_fpscr(GETPC());
|
|
return t0;
|
|
}
|
|
|
|
float32 helper_fneg_T(float32 t0)
|
|
{
|
|
return float32_chs(t0);
|
|
}
|
|
|
|
float32 helper_fsqrt_FT(float32 t0)
|
|
{
|
|
set_float_exception_flags(0, &env->fp_status);
|
|
t0 = float32_sqrt(t0, &env->fp_status);
|
|
update_fpscr(GETPC());
|
|
return t0;
|
|
}
|
|
|
|
float64 helper_fsqrt_DT(float64 t0)
|
|
{
|
|
set_float_exception_flags(0, &env->fp_status);
|
|
t0 = float64_sqrt(t0, &env->fp_status);
|
|
update_fpscr(GETPC());
|
|
return t0;
|
|
}
|
|
|
|
float32 helper_fsub_FT(float32 t0, float32 t1)
|
|
{
|
|
set_float_exception_flags(0, &env->fp_status);
|
|
t0 = float32_sub(t0, t1, &env->fp_status);
|
|
update_fpscr(GETPC());
|
|
return t0;
|
|
}
|
|
|
|
float64 helper_fsub_DT(float64 t0, float64 t1)
|
|
{
|
|
set_float_exception_flags(0, &env->fp_status);
|
|
t0 = float64_sub(t0, t1, &env->fp_status);
|
|
update_fpscr(GETPC());
|
|
return t0;
|
|
}
|
|
|
|
uint32_t helper_ftrc_FT(float32 t0)
|
|
{
|
|
uint32_t ret;
|
|
set_float_exception_flags(0, &env->fp_status);
|
|
ret = float32_to_int32_round_to_zero(t0, &env->fp_status);
|
|
update_fpscr(GETPC());
|
|
return ret;
|
|
}
|
|
|
|
uint32_t helper_ftrc_DT(float64 t0)
|
|
{
|
|
uint32_t ret;
|
|
set_float_exception_flags(0, &env->fp_status);
|
|
ret = float64_to_int32_round_to_zero(t0, &env->fp_status);
|
|
update_fpscr(GETPC());
|
|
return ret;
|
|
}
|
|
|
|
void helper_fipr(uint32_t m, uint32_t n)
|
|
{
|
|
int bank, i;
|
|
float32 r, p;
|
|
|
|
bank = (env->sr & FPSCR_FR) ? 16 : 0;
|
|
r = float32_zero;
|
|
set_float_exception_flags(0, &env->fp_status);
|
|
|
|
for (i = 0 ; i < 4 ; i++) {
|
|
p = float32_mul(env->fregs[bank + m + i],
|
|
env->fregs[bank + n + i],
|
|
&env->fp_status);
|
|
r = float32_add(r, p, &env->fp_status);
|
|
}
|
|
update_fpscr(GETPC());
|
|
|
|
env->fregs[bank + n + 3] = r;
|
|
}
|
|
|
|
void helper_ftrv(uint32_t n)
|
|
{
|
|
int bank_matrix, bank_vector;
|
|
int i, j;
|
|
float32 r[4];
|
|
float32 p;
|
|
|
|
bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16;
|
|
bank_vector = (env->sr & FPSCR_FR) ? 16 : 0;
|
|
set_float_exception_flags(0, &env->fp_status);
|
|
for (i = 0 ; i < 4 ; i++) {
|
|
r[i] = float32_zero;
|
|
for (j = 0 ; j < 4 ; j++) {
|
|
p = float32_mul(env->fregs[bank_matrix + 4 * j + i],
|
|
env->fregs[bank_vector + j],
|
|
&env->fp_status);
|
|
r[i] = float32_add(r[i], p, &env->fp_status);
|
|
}
|
|
}
|
|
update_fpscr(GETPC());
|
|
|
|
for (i = 0 ; i < 4 ; i++) {
|
|
env->fregs[bank_vector + i] = r[i];
|
|
}
|
|
}
|