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210b580b10
RTAS is a hypervisor provided binary blob that a guest loads and calls into to execute certain functions. It's similar to the vsyscall page in Linux or the short lived VMCI paravirt interface from VMware. The QEMU implementation of the RTAS blob is simply a passthrough that proxies all RTAS calls to the hypervisor via an hypercall. While we pass a CPU argument for hypercall handling in QEMU, we don't pass it for RTAS calls. Since some RTAs calls require making hypercalls (normally RTAS is implemented as guest code) we have nasty hacks to allow that. Add a CPU argument to RTAS call handling so we can more easily invoke hypercalls just as guest code would. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
201 lines
5.6 KiB
C
201 lines
5.6 KiB
C
/*
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* QEMU sPAPR NVRAM emulation
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*
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* Copyright (C) 2012 David Gibson, IBM Corporation.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <libfdt.h>
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#include "sysemu/device_tree.h"
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#include "hw/sysbus.h"
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#include "hw/ppc/spapr.h"
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#include "hw/ppc/spapr_vio.h"
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typedef struct sPAPRNVRAM {
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VIOsPAPRDevice sdev;
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uint32_t size;
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uint8_t *buf;
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BlockDriverState *drive;
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} sPAPRNVRAM;
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#define TYPE_VIO_SPAPR_NVRAM "spapr-nvram"
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#define VIO_SPAPR_NVRAM(obj) \
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OBJECT_CHECK(sPAPRNVRAM, (obj), TYPE_VIO_SPAPR_NVRAM)
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#define MIN_NVRAM_SIZE 8192
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#define DEFAULT_NVRAM_SIZE 65536
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#define MAX_NVRAM_SIZE (UINT16_MAX * 16)
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static void rtas_nvram_fetch(PowerPCCPU *cpu, sPAPREnvironment *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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sPAPRNVRAM *nvram = spapr->nvram;
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hwaddr offset, buffer, len;
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int alen;
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void *membuf;
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if ((nargs != 3) || (nret != 2)) {
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rtas_st(rets, 0, -3);
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return;
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}
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if (!nvram) {
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rtas_st(rets, 0, -1);
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rtas_st(rets, 1, 0);
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return;
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}
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offset = rtas_ld(args, 0);
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buffer = rtas_ld(args, 1);
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len = rtas_ld(args, 2);
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if (((offset + len) < offset)
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|| ((offset + len) > nvram->size)) {
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rtas_st(rets, 0, -3);
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rtas_st(rets, 1, 0);
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return;
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}
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membuf = cpu_physical_memory_map(buffer, &len, 1);
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if (nvram->drive) {
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alen = bdrv_pread(nvram->drive, offset, membuf, len);
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} else {
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assert(nvram->buf);
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memcpy(membuf, nvram->buf + offset, len);
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alen = len;
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}
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cpu_physical_memory_unmap(membuf, len, 1, len);
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rtas_st(rets, 0, (alen < len) ? -1 : 0);
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rtas_st(rets, 1, (alen < 0) ? 0 : alen);
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}
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static void rtas_nvram_store(PowerPCCPU *cpu, sPAPREnvironment *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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sPAPRNVRAM *nvram = spapr->nvram;
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hwaddr offset, buffer, len;
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int alen;
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void *membuf;
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if ((nargs != 3) || (nret != 2)) {
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rtas_st(rets, 0, -3);
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return;
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}
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if (!nvram) {
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rtas_st(rets, 0, -1);
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return;
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}
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offset = rtas_ld(args, 0);
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buffer = rtas_ld(args, 1);
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len = rtas_ld(args, 2);
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if (((offset + len) < offset)
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|| ((offset + len) > nvram->size)) {
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rtas_st(rets, 0, -3);
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return;
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}
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membuf = cpu_physical_memory_map(buffer, &len, 0);
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if (nvram->drive) {
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alen = bdrv_pwrite(nvram->drive, offset, membuf, len);
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} else {
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assert(nvram->buf);
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memcpy(nvram->buf + offset, membuf, len);
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alen = len;
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}
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cpu_physical_memory_unmap(membuf, len, 0, len);
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rtas_st(rets, 0, (alen < len) ? -1 : 0);
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rtas_st(rets, 1, (alen < 0) ? 0 : alen);
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}
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static int spapr_nvram_init(VIOsPAPRDevice *dev)
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{
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sPAPRNVRAM *nvram = VIO_SPAPR_NVRAM(dev);
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if (nvram->drive) {
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nvram->size = bdrv_getlength(nvram->drive);
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} else {
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nvram->size = DEFAULT_NVRAM_SIZE;
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nvram->buf = g_malloc0(nvram->size);
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}
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if ((nvram->size < MIN_NVRAM_SIZE) || (nvram->size > MAX_NVRAM_SIZE)) {
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fprintf(stderr, "spapr-nvram must be between %d and %d bytes in size\n",
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MIN_NVRAM_SIZE, MAX_NVRAM_SIZE);
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return -1;
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}
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spapr_rtas_register("nvram-fetch", rtas_nvram_fetch);
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spapr_rtas_register("nvram-store", rtas_nvram_store);
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return 0;
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}
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static int spapr_nvram_devnode(VIOsPAPRDevice *dev, void *fdt, int node_off)
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{
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sPAPRNVRAM *nvram = VIO_SPAPR_NVRAM(dev);
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return fdt_setprop_cell(fdt, node_off, "#bytes", nvram->size);
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}
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static Property spapr_nvram_properties[] = {
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DEFINE_SPAPR_PROPERTIES(sPAPRNVRAM, sdev),
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DEFINE_PROP_DRIVE("drive", sPAPRNVRAM, drive),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void spapr_nvram_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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VIOsPAPRDeviceClass *k = VIO_SPAPR_DEVICE_CLASS(klass);
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k->init = spapr_nvram_init;
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k->devnode = spapr_nvram_devnode;
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k->dt_name = "nvram";
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k->dt_type = "nvram";
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k->dt_compatible = "qemu,spapr-nvram";
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dc->props = spapr_nvram_properties;
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}
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static const TypeInfo spapr_nvram_type_info = {
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.name = TYPE_VIO_SPAPR_NVRAM,
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.parent = TYPE_VIO_SPAPR_DEVICE,
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.instance_size = sizeof(sPAPRNVRAM),
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.class_init = spapr_nvram_class_init,
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};
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static void spapr_nvram_register_types(void)
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{
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type_register_static(&spapr_nvram_type_info);
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}
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type_init(spapr_nvram_register_types)
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