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qemu/target-lm32
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Laurent Vivier ce5b1bbf62 exec: move cpu_exec_init() calls to realize functions 
Modify all CPUs to call it from XXX_cpu_realizefn() function.

Remove all the cannot_destroy_with_object_finalize_yet as
unsafe references have been moved to cpu_exec_realizefn().
(tested with QOM command provided by commit 4c315c27)

for arm:

Setting of cpu->mp_affinity is moved from arm_cpu_initfn()
to arm_cpu_realizefn() as setting of cpu_index is now done
in cpu_exec_realizefn(). To avoid to overwrite an user defined
value, we set it to an invalid value by default, and update
it in realize function only if the value is still invalid.

Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2016-10-24 17:29:16 -02:00
..
cpu-qom.h target-lm32: make cpu-qom.h not target specific 2016-05-19 13:08:04 +02:00
cpu.c exec: move cpu_exec_init() calls to realize functions 2016-10-24 17:29:16 -02:00
cpu.h target-*: Clean up cpu.h header guards 2016-07-12 16:19:16 +02:00
gdbstub.c qemu-common: push cpu.h inclusion out of qemu-common.h 2016-05-19 16:42:29 +02:00
helper.c cpu-exec: Rename cpu_resume_from_signal() to cpu_loop_exit_noexc() 2016-06-09 15:55:02 +01:00
helper.h tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
lm32-semi.c lm32: Clean up includes 2016-01-29 15:07:22 +00:00
machine.c qemu-common: push cpu.h inclusion out of qemu-common.h 2016-05-19 16:42:29 +02:00
Makefile.objs target-lm32: add semihosting support 2014-05-24 19:42:29 +02:00
op_helper.c Fix confusing argument names in some common functions 2016-07-12 13:06:08 +01:00
README lm32: remove lm32_sys 2014-05-24 19:43:52 +02:00
TODO target-lm32: add breakpoint/watchpoint support 2014-02-04 19:47:06 +01:00
translate.c exec: [tcg] Track which vCPU is performing translation and execution 2016-06-20 15:30:01 +01:00

README 

LatticeMico32 target
--------------------

General
-------
All opcodes including the JUART CSRs are supported.


JTAG UART
---------
JTAG UART is routed to a serial console device. For the current boards it
is the second one. Ie to enable it in the qemu virtual console window use
the following command line parameters:
  -serial vc -serial vc
This will make serial0 (the lm32_uart) and serial1 (the JTAG UART)
available as virtual consoles.


Semihosting
-----------
Semihosting on this target is supported. Some system calls like read, write
and exit are executed on the host if semihosting is enabled. See
target/lm32-semi.c for all supported system calls. Emulation aware programs
can use this mechanism to shut down the virtual machine and print to the
host console. See the tcg tests for an example.


Special instructions
--------------------
The translation recognizes one special instruction to halt the cpu:
  and r0, r0, r0
On real hardware this instruction is a nop. It is not used by GCC and
should (hopefully) not be used within hand-crafted assembly.
Insert this instruction in your idle loop to reduce the cpu load on the
host.


Ignoring the MSB of the address bus
-----------------------------------
Some SoC ignores the MSB on the address bus. Thus creating a shadow memory
area. As a general rule, 0x00000000-0x7fffffff is cached, whereas
0x80000000-0xffffffff is not cached and used to access IO devices. This
behaviour can be enabled with:
  cpu_lm32_set_phys_msb_ignore(env, 1);