Peter Maydell da96ad4a6a Misc HW patch queue ... - Remove unused MIPS SAAR* registers (Phil) - Remove warning when testing the TC58128 NAND EEPROM (Peter) - KConfig cleanups around ISA SuperI/O and MIPS (Paolo) - QDev API uses sanitization (Philippe) - Split AHCI model as PCI / SysBus (Philippe) - Add SMP support to SPARC Leon3 board (Clément) -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmXOUD4ACgkQ4+MsLN6t wN6gWRAAjf+6Z9VUvvHqZoaSJW49k+GRUelTI2tyN+eGfetAx9dk8aIbpbV1X12d pc56jsSi6ICT7baCegtxHszhYJr2e9A2QLCAOJt+Oz87kEGes3ONVVKAk7pwjKxt m8pmU3uXWgFvU6PoFBhGBa6LiZBulgLNXBUwzmEhc9PpPkR49ULdDp/qxtWvxOV5 xYBktFlkiT+AvHq3QWCnDIaw+pH5ghEq9BI4xFOvvvqSqdHEqsGAaiKPa9Po0Gfz Ap9qsm4FxKxhGoeQWtAIP8TvN3pFFSXMysziP6Xt1rffKsvF9ioghGKRM6BgQfqD ZetjcFbcf7dQu3zZVy8ljYcymMxfZcWWVVq4CMC68lPQE97hz1CT3PJjgd77dKfi z60uRkOGaiPW5iIGT9+vdQxZ5K3HivKyjuHOdV8V4HnWO3oqgfDtNHn5RKed0qUg g1FoWriJGsDixdx1vd0EoH2/oTxy4HIsFv7a1OjiZyBLjO+EeEZ3+H9pqUHqBxva +Dv70z9F1sv5dzcUXH+oCgTbnKlJ90Q+e3vj0wGdlBncVsgIwbtgqYelhUEl+xJX Mu6KNUo5ANVP38ZKG0GSMCZHfcUjc5s+5rG55NbTN0HiF56a6D2KlQAuXdUsGE1J 7i4cwipJmfxzbdPDlSb3kBxm5pFexEk6nROF9kTHQj3ZBMMvIls= =nOX+ -----END PGP SIGNATURE----- Merge tag 'hw-misc-20240215' of https://github.com/philmd/qemu into staging Misc HW patch queue - Remove unused MIPS SAAR* registers (Phil) - Remove warning when testing the TC58128 NAND EEPROM (Peter) - KConfig cleanups around ISA SuperI/O and MIPS (Paolo) - QDev API uses sanitization (Philippe) - Split AHCI model as PCI / SysBus (Philippe) - Add SMP support to SPARC Leon3 board (Clément) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmXOUD4ACgkQ4+MsLN6t # wN6gWRAAjf+6Z9VUvvHqZoaSJW49k+GRUelTI2tyN+eGfetAx9dk8aIbpbV1X12d # pc56jsSi6ICT7baCegtxHszhYJr2e9A2QLCAOJt+Oz87kEGes3ONVVKAk7pwjKxt # m8pmU3uXWgFvU6PoFBhGBa6LiZBulgLNXBUwzmEhc9PpPkR49ULdDp/qxtWvxOV5 # xYBktFlkiT+AvHq3QWCnDIaw+pH5ghEq9BI4xFOvvvqSqdHEqsGAaiKPa9Po0Gfz # Ap9qsm4FxKxhGoeQWtAIP8TvN3pFFSXMysziP6Xt1rffKsvF9ioghGKRM6BgQfqD # ZetjcFbcf7dQu3zZVy8ljYcymMxfZcWWVVq4CMC68lPQE97hz1CT3PJjgd77dKfi # z60uRkOGaiPW5iIGT9+vdQxZ5K3HivKyjuHOdV8V4HnWO3oqgfDtNHn5RKed0qUg # g1FoWriJGsDixdx1vd0EoH2/oTxy4HIsFv7a1OjiZyBLjO+EeEZ3+H9pqUHqBxva # +Dv70z9F1sv5dzcUXH+oCgTbnKlJ90Q+e3vj0wGdlBncVsgIwbtgqYelhUEl+xJX # Mu6KNUo5ANVP38ZKG0GSMCZHfcUjc5s+5rG55NbTN0HiF56a6D2KlQAuXdUsGE1J # 7i4cwipJmfxzbdPDlSb3kBxm5pFexEk6nROF9kTHQj3ZBMMvIls= # =nOX+ # -----END PGP SIGNATURE----- # gpg: Signature made Thu 15 Feb 2024 17:56:14 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20240215' of https://github.com/philmd/qemu: (56 commits) hw/ide/ich9: Use AHCIPCIState typedef hw/ide/ahci: Move SysBus definitions to 'ahci-sysbus.h' hw/ide/ahci: Remove SysbusAHCIState::num_ports field hw/ide/ahci: Do not pass 'ports' argument to ahci_realize() hw/ide/ahci: Convert AHCIState::ports to unsigned hw/ide/ahci: Pass AHCI context to ahci_ide_create_devs() hw/ide/ahci: Inline ahci_get_num_ports() hw/ide/ahci: Rename AHCI PCI function as 'pdev' hw/ide/ahci: Expose AHCIPCIState structure hw/i386/q35: Use DEVICE() cast macro with PCIDevice object hw/i386/q35: Simplify pc_q35_init() since PCI is always enabled MAINTAINERS: Add myself as reviewer for TCG Plugins MAINTAINERS: replace Fabien by myself as Leon3 maintainer hw/sparc/leon3: Initialize GPIO before realizing CPU devices hw/sparc/leon3: Pass DeviceState opaque argument to leon3_start_cpu() hw/sparc/leon3: Pass DeviceState opaque argument to leon3_set_pil_in() hw/sparc/leon3: check cpu_id in the tiny bootloader hw/sparc/leon3: implement multiprocessor hw/sparc/leon3: remove SP initialization target/sparc: implement asr17 feature for smp ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2024-02-16 11:05:14 +00:00
..
alpha	target/alpha: Use TCG_COND_TSTNE for gen_fold_mzero	2024-02-03 23:43:50 +00:00
arm	target/arm: Allow access to SPSR_hyp from hyp mode	2024-02-15 14:32:38 +00:00
avr	include/exec: Implement cpu_mmu_index generically	2024-02-03 16:46:10 +10:00
cris	include/exec: Change cpu_mmu_index argument to CPUState	2024-02-03 16:46:10 +10:00
hexagon	include/exec: Implement cpu_mmu_index generically	2024-02-03 16:46:10 +10:00
hppa	target/hppa: PDC_BTLB_INFO uses 32-bit ints	2024-02-11 13:20:23 +01:00
i386	target/i386/cpu: Fix typo in comment	2024-02-14 06:09:32 -05:00
loongarch	include/exec: Change cpu_mmu_index argument to CPUState	2024-02-03 16:46:10 +10:00
m68k	kconfig: use "select" to enable semihosting	2024-02-09 17:52:30 +00:00
microblaze	include/exec: Change cpu_mmu_index argument to CPUState	2024-02-03 16:46:10 +10:00
mips	target/mips: Remove the unused DisasContext::saar field	2024-02-15 15:53:12 +01:00
nios2	kconfig: use "select" to enable semihosting	2024-02-09 17:52:30 +00:00
openrisc	include/exec: Change cpu_mmu_index argument to CPUState	2024-02-03 16:46:10 +10:00
ppc	target/ppc/cpu-models: Rename power5+ and power7+ for new QOM naming rules	2024-02-05 14:21:21 +01:00
riscv	testing, doc and gdbstub updates:	2024-02-12 14:14:10 +00:00
rx	include/exec: Implement cpu_mmu_index generically	2024-02-03 16:46:10 +10:00
s390x	tcg: Introduce TCG_COND_TST{EQ,NE}	2024-02-08 16:08:42 +00:00
sh4	include/exec: Implement cpu_mmu_index generically	2024-02-03 16:46:10 +10:00
sparc	target/sparc: implement asr17 feature for smp	2024-02-15 16:58:46 +01:00
tricore	include/exec: Change cpu_mmu_index argument to CPUState	2024-02-03 16:46:10 +10:00
xtensa	kconfig: use "select" to enable semihosting	2024-02-09 17:52:30 +00:00
Kconfig	hw/loongarch: Add support loongson3 virt machine type.	2022-06-06 18:09:03 +00:00
meson.build	target: Make qemu_target_page_mask() available for *-user	2024-01-29 21:04:10 +10:00
target-common.c	target: Make qemu_target_page_mask() available for *-user	2024-01-29 21:04:10 +10:00