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363 lines
11 KiB
C
363 lines
11 KiB
C
/*
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* Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the Open Source and Linux Lab nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "sysemu/sysemu.h"
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#include "hw/boards.h"
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#include "hw/loader.h"
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#include "elf.h"
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#include "exec/memory.h"
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#include "exec/address-spaces.h"
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#include "hw/char/serial.h"
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#include "net/net.h"
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#include "hw/sysbus.h"
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#include "hw/block/flash.h"
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#include "sysemu/blockdev.h"
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#include "sysemu/char.h"
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#include "qemu/error-report.h"
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#include "bootparam.h"
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typedef struct LxBoardDesc {
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hwaddr flash_base;
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size_t flash_size;
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size_t flash_boot_base;
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size_t flash_sector_size;
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size_t sram_size;
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} LxBoardDesc;
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typedef struct Lx60FpgaState {
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MemoryRegion iomem;
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uint32_t leds;
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uint32_t switches;
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} Lx60FpgaState;
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static void lx60_fpga_reset(void *opaque)
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{
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Lx60FpgaState *s = opaque;
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s->leds = 0;
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s->switches = 0;
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}
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static uint64_t lx60_fpga_read(void *opaque, hwaddr addr,
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unsigned size)
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{
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Lx60FpgaState *s = opaque;
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switch (addr) {
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case 0x0: /*build date code*/
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return 0x09272011;
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case 0x4: /*processor clock frequency, Hz*/
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return 10000000;
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case 0x8: /*LEDs (off = 0, on = 1)*/
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return s->leds;
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case 0xc: /*DIP switches (off = 0, on = 1)*/
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return s->switches;
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}
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return 0;
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}
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static void lx60_fpga_write(void *opaque, hwaddr addr,
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uint64_t val, unsigned size)
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{
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Lx60FpgaState *s = opaque;
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switch (addr) {
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case 0x8: /*LEDs (off = 0, on = 1)*/
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s->leds = val;
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break;
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case 0x10: /*board reset*/
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if (val == 0xdead) {
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qemu_system_reset_request();
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}
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break;
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}
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}
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static const MemoryRegionOps lx60_fpga_ops = {
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.read = lx60_fpga_read,
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.write = lx60_fpga_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static Lx60FpgaState *lx60_fpga_init(MemoryRegion *address_space,
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hwaddr base)
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{
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Lx60FpgaState *s = g_malloc(sizeof(Lx60FpgaState));
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memory_region_init_io(&s->iomem, NULL, &lx60_fpga_ops, s,
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"lx60.fpga", 0x10000);
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memory_region_add_subregion(address_space, base, &s->iomem);
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lx60_fpga_reset(s);
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qemu_register_reset(lx60_fpga_reset, s);
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return s;
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}
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static void lx60_net_init(MemoryRegion *address_space,
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hwaddr base,
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hwaddr descriptors,
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hwaddr buffers,
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qemu_irq irq, NICInfo *nd)
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{
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DeviceState *dev;
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SysBusDevice *s;
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MemoryRegion *ram;
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dev = qdev_create(NULL, "open_eth");
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qdev_set_nic_properties(dev, nd);
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qdev_init_nofail(dev);
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s = SYS_BUS_DEVICE(dev);
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sysbus_connect_irq(s, 0, irq);
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memory_region_add_subregion(address_space, base,
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sysbus_mmio_get_region(s, 0));
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memory_region_add_subregion(address_space, descriptors,
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sysbus_mmio_get_region(s, 1));
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ram = g_malloc(sizeof(*ram));
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memory_region_init_ram(ram, OBJECT(s), "open_eth.ram", 16384);
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vmstate_register_ram_global(ram);
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memory_region_add_subregion(address_space, buffers, ram);
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}
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static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
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{
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XtensaCPU *cpu = opaque;
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return cpu_get_phys_page_debug(CPU(cpu), addr);
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}
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static void lx60_reset(void *opaque)
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{
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XtensaCPU *cpu = opaque;
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cpu_reset(CPU(cpu));
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}
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static void lx_init(const LxBoardDesc *board, MachineState *machine)
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{
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#ifdef TARGET_WORDS_BIGENDIAN
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int be = 1;
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#else
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int be = 0;
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#endif
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MemoryRegion *system_memory = get_system_memory();
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XtensaCPU *cpu = NULL;
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CPUXtensaState *env = NULL;
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MemoryRegion *ram, *rom, *system_io;
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DriveInfo *dinfo;
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pflash_t *flash = NULL;
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const char *cpu_model = machine->cpu_model;
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const char *kernel_filename = machine->kernel_filename;
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const char *kernel_cmdline = machine->kernel_cmdline;
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int n;
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if (!cpu_model) {
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cpu_model = XTENSA_DEFAULT_CPU_MODEL;
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}
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for (n = 0; n < smp_cpus; n++) {
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cpu = cpu_xtensa_init(cpu_model);
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if (cpu == NULL) {
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error_report("unable to find CPU definition '%s'\n",
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cpu_model);
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exit(EXIT_FAILURE);
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}
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env = &cpu->env;
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env->sregs[PRID] = n;
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qemu_register_reset(lx60_reset, cpu);
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/* Need MMU initialized prior to ELF loading,
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* so that ELF gets loaded into virtual addresses
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*/
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cpu_reset(CPU(cpu));
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}
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ram = g_malloc(sizeof(*ram));
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memory_region_init_ram(ram, NULL, "lx60.dram", machine->ram_size);
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vmstate_register_ram_global(ram);
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memory_region_add_subregion(system_memory, 0, ram);
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system_io = g_malloc(sizeof(*system_io));
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memory_region_init(system_io, NULL, "lx60.io", 224 * 1024 * 1024);
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memory_region_add_subregion(system_memory, 0xf0000000, system_io);
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lx60_fpga_init(system_io, 0x0d020000);
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if (nd_table[0].used) {
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lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000,
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xtensa_get_extint(env, 1), nd_table);
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}
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if (!serial_hds[0]) {
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serial_hds[0] = qemu_chr_new("serial0", "null", NULL);
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}
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serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0),
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115200, serial_hds[0], DEVICE_NATIVE_ENDIAN);
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dinfo = drive_get(IF_PFLASH, 0, 0);
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if (dinfo) {
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flash = pflash_cfi01_register(board->flash_base,
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NULL, "lx60.io.flash", board->flash_size,
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dinfo->bdrv, board->flash_sector_size,
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board->flash_size / board->flash_sector_size,
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4, 0x0000, 0x0000, 0x0000, 0x0000, be);
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if (flash == NULL) {
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error_report("unable to mount pflash\n");
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exit(EXIT_FAILURE);
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}
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}
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/* Use presence of kernel file name as 'boot from SRAM' switch. */
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if (kernel_filename) {
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rom = g_malloc(sizeof(*rom));
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memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size);
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vmstate_register_ram_global(rom);
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memory_region_add_subregion(system_memory, 0xfe000000, rom);
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/* Put kernel bootparameters to the end of that SRAM */
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if (kernel_cmdline) {
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size_t cmdline_size = strlen(kernel_cmdline) + 1;
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size_t bp_size = sizeof(BpTag[4]) + cmdline_size;
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uint32_t tagptr = (0xfe000000 + board->sram_size - bp_size) & ~0xff;
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env->regs[2] = tagptr;
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tagptr = put_tag(tagptr, 0x7b0b, 0, NULL);
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if (cmdline_size > 1) {
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tagptr = put_tag(tagptr, 0x1001,
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cmdline_size, kernel_cmdline);
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}
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tagptr = put_tag(tagptr, 0x7e0b, 0, NULL);
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}
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uint64_t elf_entry;
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uint64_t elf_lowaddr;
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int success = load_elf(kernel_filename, translate_phys_addr, cpu,
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&elf_entry, &elf_lowaddr, NULL, be, ELF_MACHINE, 0);
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if (success > 0) {
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env->pc = elf_entry;
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}
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} else {
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if (flash) {
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MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash);
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MemoryRegion *flash_io = g_malloc(sizeof(*flash_io));
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memory_region_init_alias(flash_io, NULL, "lx60.flash",
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flash_mr, board->flash_boot_base,
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board->flash_size - board->flash_boot_base < 0x02000000 ?
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board->flash_size - board->flash_boot_base : 0x02000000);
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memory_region_add_subregion(system_memory, 0xfe000000,
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flash_io);
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}
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}
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}
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static void xtensa_lx60_init(MachineState *machine)
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{
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static const LxBoardDesc lx60_board = {
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.flash_base = 0xf8000000,
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.flash_size = 0x00400000,
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.flash_sector_size = 0x10000,
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.sram_size = 0x20000,
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};
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lx_init(&lx60_board, machine);
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}
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static void xtensa_lx200_init(MachineState *machine)
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{
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static const LxBoardDesc lx200_board = {
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.flash_base = 0xf8000000,
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.flash_size = 0x01000000,
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.flash_sector_size = 0x20000,
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.sram_size = 0x2000000,
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};
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lx_init(&lx200_board, machine);
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}
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static void xtensa_ml605_init(MachineState *machine)
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{
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static const LxBoardDesc ml605_board = {
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.flash_base = 0xf8000000,
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.flash_size = 0x02000000,
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.flash_sector_size = 0x20000,
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.sram_size = 0x2000000,
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};
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lx_init(&ml605_board, machine);
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}
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static void xtensa_kc705_init(MachineState *machine)
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{
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static const LxBoardDesc kc705_board = {
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.flash_base = 0xf0000000,
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.flash_size = 0x08000000,
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.flash_boot_base = 0x06000000,
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.flash_sector_size = 0x20000,
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.sram_size = 0x2000000,
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};
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lx_init(&kc705_board, machine);
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}
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static QEMUMachine xtensa_lx60_machine = {
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.name = "lx60",
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.desc = "lx60 EVB (" XTENSA_DEFAULT_CPU_MODEL ")",
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.init = xtensa_lx60_init,
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.max_cpus = 4,
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};
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static QEMUMachine xtensa_lx200_machine = {
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.name = "lx200",
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.desc = "lx200 EVB (" XTENSA_DEFAULT_CPU_MODEL ")",
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.init = xtensa_lx200_init,
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.max_cpus = 4,
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};
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static QEMUMachine xtensa_ml605_machine = {
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.name = "ml605",
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.desc = "ml605 EVB (" XTENSA_DEFAULT_CPU_MODEL ")",
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.init = xtensa_ml605_init,
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.max_cpus = 4,
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};
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static QEMUMachine xtensa_kc705_machine = {
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.name = "kc705",
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.desc = "kc705 EVB (" XTENSA_DEFAULT_CPU_MODEL ")",
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.init = xtensa_kc705_init,
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.max_cpus = 4,
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};
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static void xtensa_lx_machines_init(void)
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{
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qemu_register_machine(&xtensa_lx60_machine);
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qemu_register_machine(&xtensa_lx200_machine);
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qemu_register_machine(&xtensa_ml605_machine);
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qemu_register_machine(&xtensa_kc705_machine);
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}
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machine_init(xtensa_lx_machines_init);
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