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7da2981e59
Move all trace-events for files in the hw/usb/ directory to their own file. Signed-off-by: Daniel P. Berrange <berrange@redhat.com> Message-id: 1466066426-16657-15-git-send-email-berrange@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
1008 lines
68 KiB
Plaintext
1008 lines
68 KiB
Plaintext
# Trace events for debugging and performance instrumentation
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#
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# This file is processed by the tracetool script during the build.
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#
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# To add a new trace event:
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#
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# 1. Choose a name for the trace event. Declare its arguments and format
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# string.
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#
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# 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() ->
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# trace_multiwrite_cb(). The source file must #include "trace.h".
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#
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# Format of a trace event:
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#
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# [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>"
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#
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# Example: g_malloc(size_t size) "size %zu"
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#
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# The "disable" keyword will build without the trace event.
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#
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# The <name> must be a valid as a C function name.
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#
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# Types should be standard C types. Use void * for pointers because the trace
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# system may not have the necessary headers included.
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#
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# The <format-string> should be a sprintf()-compatible format string.
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# thread-pool.c
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thread_pool_submit(void *pool, void *req, void *opaque) "pool %p req %p opaque %p"
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thread_pool_complete(void *pool, void *req, void *opaque, int ret) "pool %p req %p opaque %p ret %d"
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thread_pool_cancel(void *req, void *opaque) "req %p opaque %p"
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# ioport.c
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cpu_in(unsigned int addr, char size, unsigned int val) "addr %#x(%c) value %u"
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cpu_out(unsigned int addr, char size, unsigned int val) "addr %#x(%c) value %u"
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# balloon.c
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# Since requests are raised via monitor, not many tracepoints are needed.
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balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
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virtio_balloon_handle_output(const char *name, uint64_t gpa) "section name: %s gpa: %"PRIx64
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virtio_balloon_get_config(uint32_t num_pages, uint32_t actual) "num_pages: %d actual: %d"
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virtio_balloon_set_config(uint32_t actual, uint32_t oldactual) "actual: %d oldactual: %d"
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virtio_balloon_to_target(uint64_t target, uint32_t num_pages) "balloon target: %"PRIx64" num_pages: %d"
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# hw/nvram/ds1225y.c
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nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x"
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nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x"
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# hw/nvram/fw_cfg.c
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fw_cfg_select(void *s, uint16_t key, int ret) "%p key %d = %d"
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fw_cfg_read(void *s, uint64_t ret) "%p = %"PRIx64
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fw_cfg_add_file(void *s, int index, char *name, size_t len) "%p #%d: %s (%zd bytes)"
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# hw/display/jazz_led.c
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jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x"
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jazz_led_write(uint64_t addr, uint8_t new) "write addr=0x%"PRIx64": 0x%x"
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# hw/display/xenfb.c
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xenfb_mouse_event(void *opaque, int dx, int dy, int dz, int button_state, int abs_pointer_wanted) "%p x %d y %d z %d bs %#x abs %d"
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xenfb_input_connected(void *xendev, int abs_pointer_wanted) "%p abs %d"
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# hw/input/ps2.c
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ps2_put_keycode(void *opaque, int keycode) "%p keycode %d"
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ps2_read_data(void *opaque) "%p"
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ps2_set_ledstate(void *s, int ledstate) "%p ledstate %d"
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ps2_reset_keyboard(void *s) "%p"
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ps2_write_keyboard(void *opaque, int val) "%p val %d"
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ps2_keyboard_set_translation(void *opaque, int mode) "%p mode %d"
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ps2_mouse_send_packet(void *s, int dx1, int dy1, int dz1, int b) "%p x %d y %d z %d bs %#x"
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ps2_mouse_event_disabled(void *opaque, int dx, int dy, int dz, int buttons_state, int mouse_dx, int mouse_dy, int mouse_dz) "%p x %d y %d z %d bs %#x mx %d my %d mz %d "
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ps2_mouse_event(void *opaque, int dx, int dy, int dz, int buttons_state, int mouse_dx, int mouse_dy, int mouse_dz) "%p x %d y %d z %d bs %#x mx %d my %d mz %d "
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ps2_mouse_fake_event(void *opaque) "%p"
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ps2_write_mouse(void *opaque, int val) "%p val %d"
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ps2_kbd_reset(void *opaque) "%p"
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ps2_mouse_reset(void *opaque) "%p"
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ps2_kbd_init(void *s) "%p"
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ps2_mouse_init(void *s) "%p"
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# hw/timer/slavio_timer.c
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slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x"
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slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x"
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slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64
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slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x"
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slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x"
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slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64
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slavio_timer_mem_writel_counter_invalid(void) "not user timer"
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slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started"
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slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped"
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slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer"
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slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter"
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slavio_timer_mem_writel_mode_invalid(void) "not system timer"
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slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64
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# hw/dma/rc4030.c
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jazzio_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
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jazzio_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
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rc4030_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
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rc4030_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
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# hw/dma/sparc32_dma.c
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ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64
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ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64
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sparc32_dma_set_irq_raise(void) "Raise IRQ"
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sparc32_dma_set_irq_lower(void) "Lower IRQ"
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espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
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espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
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sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x"
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sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x"
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sparc32_dma_enable_raise(void) "Raise DMA enable"
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sparc32_dma_enable_lower(void) "Lower DMA enable"
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# hw/sparc/sun4m.c
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sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
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sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
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sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
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sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
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# hw/dma/sun4m_iommu.c
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sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
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sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
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sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64
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sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x"
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sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x"
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sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x"
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sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x"
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sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64
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# hw/scsi/scsi-bus.c
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scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d"
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scsi_req_cancel(int target, int lun, int tag) "target %d lun %d tag %d"
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scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
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scsi_req_data_canceled(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
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scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d"
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scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d"
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scsi_req_continue_canceled(int target, int lun, int tag) "target %d lun %d tag %d"
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scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d"
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scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64
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scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d"
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scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x"
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scsi_device_set_ua(int target, int lun, int key, int asc, int ascq) "target %d lun %d key %#02x asc %#02x ascq %#02x"
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scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d"
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scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x"
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scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d"
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scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d"
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# vl.c
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vm_state_notify(int running, int reason) "running %d reason %d"
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load_file(const char *name, const char *path) "name %s location %s"
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runstate_set(int new_state) "new state %d"
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system_wakeup_request(int reason) "reason=%d"
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qemu_system_shutdown_request(void) ""
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qemu_system_powerdown_request(void) ""
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# hw/display/g364fb.c
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g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x"
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g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x"
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# hw/timer/grlib_gptimer.c
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grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
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grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
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grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
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grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x"
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grlib_gptimer_hit(int id) "timer:%d HIT"
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grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
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grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
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# hw/sparc/leon3.c
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leon3_set_irq(int intno) "Set CPU IRQ %d"
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leon3_reset_irq(int intno) "Reset CPU IRQ %d"
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# spice-qemu-char.c
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spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d"
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spice_vmc_read(int bytes, int len) "spice read %d of requested %d"
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spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
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spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
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spice_vmc_event(int event) "spice vmc event %d"
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# hw/timer/lm32_timer.c
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lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
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lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
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lm32_timer_hit(void) "timer hit"
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lm32_timer_irq_state(int level) "irq state %d"
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# hw/scsi/mptsas.c
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mptsas_command_complete(void *dev, uint32_t ctx, uint32_t status, uint32_t resid) "dev %p context 0x%08x status %x resid %d"
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mptsas_diag_read(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%08x"
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mptsas_diag_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%08x"
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mptsas_irq_intx(void *dev, int level) "dev %p level %d"
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mptsas_irq_msi(void *dev) "dev %p "
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mptsas_mmio_read(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%x"
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mptsas_mmio_unhandled_read(void *dev, uint32_t addr) "dev %p addr 0x%08x"
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mptsas_mmio_unhandled_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%x"
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mptsas_mmio_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%x"
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mptsas_process_message(void *dev, int msg, uint32_t ctx) "dev %p cmd %d context 0x%08x\n"
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mptsas_process_scsi_io_request(void *dev, int bus, int target, int lun, uint64_t len) "dev %p dev %d:%d:%d length %"PRIu64""
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mptsas_reset(void *dev) "dev %p "
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mptsas_scsi_overflow(void *dev, uint32_t ctx, uint64_t req, uint64_t found) "dev %p context 0x%08x: %"PRIu64"/%"PRIu64""
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mptsas_sgl_overflow(void *dev, uint32_t ctx, uint64_t req, uint64_t found) "dev %p context 0x%08x: %"PRIu64"/%"PRIu64""
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mptsas_unhandled_cmd(void *dev, uint32_t ctx, uint8_t msg_cmd) "dev %p context 0x%08x: Unhandled cmd %x"
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mptsas_unhandled_doorbell_cmd(void *dev, int cmd) "dev %p value 0x%08x"
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# hw/scsi/mptconfig.c
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mptsas_config_sas_device(void *dev, int address, int port, int phy_handle, int dev_handle, int page) "dev %p address %d (port %d, handles: phy %d dev %d) page %d"
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mptsas_config_sas_phy(void *dev, int address, int port, int phy_handle, int dev_handle, int page) "dev %p address %d (port %d, handles: phy %d dev %d) page %d"
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# hw/scsi/megasas.c
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megasas_init_firmware(uint64_t pa) "pa %" PRIx64 " "
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megasas_init_queue(uint64_t queue_pa, int queue_len, uint64_t head, uint64_t tail, uint32_t flags) "queue at %" PRIx64 " len %d head %" PRIx64 " tail %" PRIx64 " flags %x"
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megasas_initq_map_failed(int frame) "scmd %d: failed to map queue"
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megasas_initq_mapped(uint64_t pa) "queue already mapped at %" PRIx64
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megasas_initq_mismatch(int queue_len, int fw_cmds) "queue size %d max fw cmds %d"
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megasas_qf_mapped(unsigned int index) "skip mapped frame %x"
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megasas_qf_new(unsigned int index, uint64_t frame) "frame %x addr %" PRIx64
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megasas_qf_busy(unsigned long pa) "all frames busy for frame %lx"
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megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, unsigned int head, unsigned int tail, int busy) "frame %x count %d context %" PRIx64 " head %x tail %x busy %d"
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megasas_qf_update(unsigned int head, unsigned int tail, unsigned int busy) "head %x tail %x busy %d"
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megasas_qf_map_failed(int cmd, unsigned long frame) "scmd %d: frame %lu"
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megasas_qf_complete_noirq(uint64_t context) "context %" PRIx64 " "
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megasas_qf_complete(uint64_t context, unsigned int head, unsigned int tail, int busy) "context %" PRIx64 " head %x tail %x busy %d"
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megasas_frame_busy(uint64_t addr) "frame %" PRIx64 " busy"
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megasas_unhandled_frame_cmd(int cmd, uint8_t frame_cmd) "scmd %d: MFI cmd %x"
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megasas_handle_scsi(const char *frame, int bus, int dev, int lun, void *sdev, unsigned long size) "%s dev %x/%x/%x sdev %p xfer %lu"
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megasas_scsi_target_not_present(const char *frame, int bus, int dev, int lun) "%s dev %x/%x/%x"
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megasas_scsi_invalid_cdb_len(const char *frame, int bus, int dev, int lun, int len) "%s dev %x/%x/%x invalid cdb len %d"
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megasas_iov_read_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
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megasas_iov_write_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
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megasas_iov_read_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
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megasas_iov_write_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes"
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megasas_scsi_req_alloc_failed(const char *frame, int dev, int lun) "%s dev %x/%x"
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megasas_scsi_read_start(int cmd, int len) "scmd %d: transfer %d bytes of data"
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megasas_scsi_write_start(int cmd, int len) "scmd %d: transfer %d bytes of data"
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megasas_scsi_nodata(int cmd) "scmd %d: no data to be transferred"
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megasas_scsi_complete(int cmd, uint32_t status, int len, int xfer) "scmd %d: status %x, len %u/%u"
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megasas_command_complete(int cmd, uint32_t status, uint32_t resid) "scmd %d: status %x, residual %d"
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megasas_handle_io(int cmd, const char *frame, int dev, int lun, unsigned long lba, unsigned long count) "scmd %d: %s dev %x/%x lba %lx count %lu"
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megasas_io_target_not_present(int cmd, const char *frame, int dev, int lun) "scmd %d: %s dev 1/%x/%x LUN not present"
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megasas_io_read_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)"
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megasas_io_write_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA %lx %lu blocks (%lu bytes)"
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megasas_io_complete(int cmd, uint32_t len) "scmd %d: %d bytes"
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megasas_iovec_sgl_overflow(int cmd, int index, int limit) "scmd %d: iovec count %d limit %d"
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megasas_iovec_sgl_underflow(int cmd, int index) "scmd %d: iovec count %d"
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megasas_iovec_sgl_invalid(int cmd, int index, uint64_t pa, uint32_t len) "scmd %d: element %d pa %" PRIx64 " len %u"
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megasas_iovec_overflow(int cmd, int len, int limit) "scmd %d: len %d limit %d"
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megasas_iovec_underflow(int cmd, int len, int limit) "scmd %d: len %d limit %d"
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megasas_handle_dcmd(int cmd, int opcode) "scmd %d: MFI DCMD opcode %x"
|
|
megasas_finish_dcmd(int cmd, int size) "scmd %d: MFI DCMD wrote %d bytes"
|
|
megasas_dcmd_req_alloc_failed(int cmd, const char *desc) "scmd %d: %s"
|
|
megasas_dcmd_internal_submit(int cmd, const char *desc, int dev) "scmd %d: %s to dev %d"
|
|
megasas_dcmd_internal_finish(int cmd, int opcode, int lun) "scmd %d: cmd %x lun %d"
|
|
megasas_dcmd_internal_invalid(int cmd, int opcode) "scmd %d: DCMD %x"
|
|
megasas_dcmd_unhandled(int cmd, int opcode, int len) "scmd %d: opcode %x, len %d"
|
|
megasas_dcmd_zero_sge(int cmd) "scmd %d: zero DCMD sge count"
|
|
megasas_dcmd_invalid_sge(int cmd, int count) "scmd %d: DCMD sge count %d"
|
|
megasas_dcmd_invalid_xfer_len(int cmd, unsigned long size, unsigned long max) "scmd %d: xfer len %ld, max %ld"
|
|
megasas_dcmd_enter(int cmd, const char *dcmd, int len) "scmd %d: DCMD %s len %d"
|
|
megasas_dcmd_dummy(int cmd, unsigned long size) "scmd %d: xfer len %ld"
|
|
megasas_dcmd_set_fw_time(int cmd, unsigned long time) "scmd %d: Set FW time %lx"
|
|
megasas_dcmd_pd_get_list(int cmd, int num, int max, int offset) "scmd %d: DCMD PD get list: %d / %d PDs, size %d"
|
|
megasas_dcmd_ld_get_list(int cmd, int num, int max) "scmd %d: DCMD LD get list: found %d / %d LDs"
|
|
megasas_dcmd_ld_get_info(int cmd, int ld_id) "scmd %d: dev %d"
|
|
megasas_dcmd_ld_list_query(int cmd, int flags) "scmd %d: query flags %x"
|
|
megasas_dcmd_pd_get_info(int cmd, int pd_id) "scmd %d: dev %d"
|
|
megasas_dcmd_pd_list_query(int cmd, int flags) "scmd %d: query flags %x"
|
|
megasas_dcmd_reset_ld(int cmd, int target_id) "scmd %d: dev %d"
|
|
megasas_dcmd_unsupported(int cmd, unsigned long size) "scmd %d: set properties len %ld"
|
|
megasas_abort_frame(int cmd, int abort_cmd) "scmd %d: frame %x"
|
|
megasas_abort_no_cmd(int cmd, uint64_t context) "scmd %d: no active command for frame context %" PRIx64
|
|
megasas_abort_invalid_context(int cmd, uint64_t context, int abort_cmd) "scmd %d: invalid frame context %" PRIx64 " for abort frame %x"
|
|
megasas_reset(int fw_state) "firmware state %x"
|
|
megasas_init(int sges, int cmds, const char *mode) "Using %d sges, %d cmds, %s mode"
|
|
megasas_msix_raise(int vector) "vector %d"
|
|
megasas_msi_raise(int vector) "vector %d"
|
|
megasas_irq_lower(void) "INTx"
|
|
megasas_irq_raise(void) "INTx"
|
|
megasas_intr_enabled(void) "Interrupts enabled"
|
|
megasas_intr_disabled(void) "Interrupts disabled"
|
|
megasas_msix_enabled(int vector) "vector %d"
|
|
megasas_msi_enabled(int vector) "vector %d"
|
|
megasas_mmio_readl(const char *reg, uint32_t val) "reg %s: 0x%x"
|
|
megasas_mmio_invalid_readl(unsigned long addr) "addr 0x%lx"
|
|
megasas_mmio_writel(const char *reg, uint32_t val) "reg %s: 0x%x"
|
|
megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x"
|
|
|
|
# hw/sd/milkymist-memcard.c
|
|
milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
|
|
# hw/input/milkymist-softusb.c
|
|
milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_softusb_mevt(uint8_t m) "m %d"
|
|
milkymist_softusb_kevt(uint8_t m) "m %d"
|
|
milkymist_softusb_pulse_irq(void) "Pulse IRQ"
|
|
|
|
# hw/timer/milkymist-sysctl.c
|
|
milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_sysctl_icap_write(uint32_t value) "value %08x"
|
|
milkymist_sysctl_start_timer0(void) "Start timer0"
|
|
milkymist_sysctl_stop_timer0(void) "Stop timer0"
|
|
milkymist_sysctl_start_timer1(void) "Start timer1"
|
|
milkymist_sysctl_stop_timer1(void) "Stop timer1"
|
|
milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0"
|
|
milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1"
|
|
|
|
# hw/display/milkymist-tmu2.c
|
|
milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_tmu2_start(void) "Start TMU"
|
|
milkymist_tmu2_pulse_irq(void) "Pulse IRQ"
|
|
|
|
# hw/display/milkymist-vgafb.c
|
|
milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
|
|
# hw/isa/pc87312.c
|
|
pc87312_io_read(uint32_t addr, uint32_t val) "read addr=%x val=%x"
|
|
pc87312_io_write(uint32_t addr, uint32_t val) "write addr=%x val=%x"
|
|
pc87312_info_floppy(uint32_t base) "base 0x%x"
|
|
pc87312_info_ide(uint32_t base) "base 0x%x"
|
|
pc87312_info_parallel(uint32_t base, uint32_t irq) "base 0x%x, irq %u"
|
|
pc87312_info_serial(int n, uint32_t base, uint32_t irq) "id=%d, base 0x%x, irq %u"
|
|
|
|
# hw/scsi/vmw_pvscsi.c
|
|
pvscsi_ring_init_data(uint32_t txr_len_log2, uint32_t rxr_len_log2) "TX/RX rings logarithms set to %d/%d"
|
|
pvscsi_ring_init_msg(uint32_t len_log2) "MSG ring logarithm set to %d"
|
|
pvscsi_ring_flush_cmp(uint64_t filled_cmp_ptr) "new production counter of completion ring is 0x%"PRIx64
|
|
pvscsi_ring_flush_msg(uint64_t filled_cmp_ptr) "new production counter of message ring is 0x%"PRIx64
|
|
pvscsi_update_irq_level(bool raise, uint64_t mask, uint64_t status) "interrupt level set to %d (MASK: 0x%"PRIx64", STATUS: 0x%"PRIx64")"
|
|
pvscsi_update_irq_msi(void) "sending MSI notification"
|
|
pvscsi_cmp_ring_put(unsigned long addr) "got completion descriptor 0x%lx"
|
|
pvscsi_msg_ring_put(unsigned long addr) "got message descriptor 0x%lx"
|
|
pvscsi_complete_request(uint64_t context, uint64_t len, uint8_t sense_key) "completion: ctx: 0x%"PRIx64", len: 0x%"PRIx64", sense key: %u"
|
|
pvscsi_get_sg_list(int nsg, size_t size) "get SG list: depth: %u, size: %zu"
|
|
pvscsi_get_next_sg_elem(uint32_t flags) "unknown flags in SG element (val: 0x%x)"
|
|
pvscsi_command_complete_not_found(uint32_t tag) "can't find request for tag 0x%x"
|
|
pvscsi_command_complete_data_run(void) "not all data required for command transferred"
|
|
pvscsi_command_complete_sense_len(int len) "sense information length is %d bytes"
|
|
pvscsi_convert_sglist(uint64_t context, unsigned long addr, uint32_t resid) "element: ctx: 0x%"PRIx64" addr: 0x%lx, len: %ul"
|
|
pvscsi_process_req_descr(uint8_t cmd, uint64_t ctx) "SCSI cmd 0x%x, ctx: 0x%"PRIx64
|
|
pvscsi_process_req_descr_unknown_device(void) "command directed to unknown device rejected"
|
|
pvscsi_process_req_descr_invalid_dir(void) "command with invalid transfer direction rejected"
|
|
pvscsi_process_io(unsigned long addr) "got descriptor 0x%lx"
|
|
pvscsi_on_cmd_noimpl(const char* cmd) "unimplemented command %s ignored"
|
|
pvscsi_on_cmd_reset_dev(uint32_t tgt, int lun, void* dev) "PVSCSI_CMD_RESET_DEVICE[target %u lun %d (dev 0x%p)]"
|
|
pvscsi_on_cmd_arrived(const char* cmd) "command %s arrived"
|
|
pvscsi_on_cmd_abort(uint64_t ctx, uint32_t tgt) "command PVSCSI_CMD_ABORT_CMD for ctx 0x%"PRIx64", target %u"
|
|
pvscsi_on_cmd_unknown(uint64_t cmd_id) "unknown command %"PRIx64
|
|
pvscsi_on_cmd_unknown_data(uint32_t data) "data for unknown command 0x:%x"
|
|
pvscsi_io_write(const char* cmd, uint64_t val) "%s write: %"PRIx64
|
|
pvscsi_io_write_unknown(unsigned long addr, unsigned sz, uint64_t val) "unknown write address: 0x%lx size: %u bytes value: 0x%"PRIx64
|
|
pvscsi_io_read(const char* cmd, uint64_t status) "%s read: 0x%"PRIx64
|
|
pvscsi_io_read_unknown(unsigned long addr, unsigned sz) "unknown read address: 0x%lx size: %u bytes"
|
|
pvscsi_init_msi_fail(int res) "failed to initialize MSI, error %d"
|
|
pvscsi_state(const char* state) "starting %s ..."
|
|
pvscsi_tx_rings_ppn(const char* label, uint64_t ppn) "%s page: %"PRIx64
|
|
pvscsi_tx_rings_num_pages(const char* label, uint32_t num) "Number of %s pages: %u"
|
|
|
|
# xen-hvm.c
|
|
xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx"
|
|
xen_client_set_memory(uint64_t start_addr, unsigned long size, bool log_dirty) "%#"PRIx64" size %#lx, log_dirty %i"
|
|
xen_ioreq_server_create(uint32_t id) "id: %u"
|
|
xen_ioreq_server_destroy(uint32_t id) "id: %u"
|
|
xen_ioreq_server_state(uint32_t id, bool enable) "id: %u: enable: %i"
|
|
xen_map_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
|
|
xen_unmap_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
|
|
xen_map_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
|
|
xen_unmap_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64
|
|
xen_map_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) "id: %u bdf: %02x.%02x.%02x"
|
|
xen_unmap_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) "id: %u bdf: %02x.%02x.%02x"
|
|
handle_ioreq(void *req, uint32_t type, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p type=%d dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
|
|
handle_ioreq_read(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p read type=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
|
|
handle_ioreq_write(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p write type=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
|
|
cpu_ioreq_pio(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p pio dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
|
|
cpu_ioreq_pio_read_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) "I/O=%p pio read reg data=%#"PRIx64" port=%#"PRIx64" size=%d"
|
|
cpu_ioreq_pio_write_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) "I/O=%p pio write reg data=%#"PRIx64" port=%#"PRIx64" size=%d"
|
|
cpu_ioreq_move(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p copy dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d"
|
|
|
|
# xen-mapcache.c
|
|
xen_map_cache(uint64_t phys_addr) "want %#"PRIx64
|
|
xen_remap_bucket(uint64_t index) "index %#"PRIx64
|
|
xen_map_cache_return(void* ptr) "%p"
|
|
|
|
# hw/i386/xen/xen_platform.c
|
|
xen_platform_log(char *s) "xen platform: %s"
|
|
|
|
# qemu-coroutine.c
|
|
qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p"
|
|
qemu_coroutine_yield(void *from, void *to) "from %p to %p"
|
|
qemu_coroutine_terminate(void *co) "self %p"
|
|
|
|
# qemu-coroutine-lock.c
|
|
qemu_co_queue_run_restart(void *co) "co %p"
|
|
qemu_co_queue_next(void *nxt) "next %p"
|
|
qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p"
|
|
qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p"
|
|
qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p"
|
|
qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p"
|
|
|
|
# hw/scsi/esp.c
|
|
esp_error_fifo_overrun(void) "FIFO overrun"
|
|
esp_error_unhandled_command(uint32_t val) "unhandled command (%2.2x)"
|
|
esp_error_invalid_write(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]"
|
|
esp_raise_irq(void) "Raise IRQ"
|
|
esp_lower_irq(void) "Lower IRQ"
|
|
esp_dma_enable(void) "Raise enable"
|
|
esp_dma_disable(void) "Lower enable"
|
|
esp_get_cmd(uint32_t dmalen, int target) "len %d target %d"
|
|
esp_do_busid_cmd(uint8_t busid) "busid 0x%x"
|
|
esp_handle_satn_stop(uint32_t cmdlen) "cmdlen %d"
|
|
esp_write_response(uint32_t status) "Transfer status (status=%d)"
|
|
esp_do_dma(uint32_t cmdlen, uint32_t len) "command len %d + %d"
|
|
esp_command_complete(void) "SCSI Command complete"
|
|
esp_command_complete_unexpected(void) "SCSI command completed unexpectedly"
|
|
esp_command_complete_fail(void) "Command failed"
|
|
esp_transfer_data(uint32_t dma_left, int32_t ti_size) "transfer %d/%d"
|
|
esp_handle_ti(uint32_t minlen) "Transfer Information len %d"
|
|
esp_handle_ti_cmd(uint32_t cmdlen) "command len %d"
|
|
esp_mem_readb(uint32_t saddr, uint8_t reg) "reg[%d]: 0x%2.2x"
|
|
esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) "reg[%d]: 0x%2.2x -> 0x%2.2x"
|
|
esp_mem_writeb_cmd_nop(uint32_t val) "NOP (%2.2x)"
|
|
esp_mem_writeb_cmd_flush(uint32_t val) "Flush FIFO (%2.2x)"
|
|
esp_mem_writeb_cmd_reset(uint32_t val) "Chip reset (%2.2x)"
|
|
esp_mem_writeb_cmd_bus_reset(uint32_t val) "Bus reset (%2.2x)"
|
|
esp_mem_writeb_cmd_iccs(uint32_t val) "Initiator Command Complete Sequence (%2.2x)"
|
|
esp_mem_writeb_cmd_msgacc(uint32_t val) "Message Accepted (%2.2x)"
|
|
esp_mem_writeb_cmd_pad(uint32_t val) "Transfer padding (%2.2x)"
|
|
esp_mem_writeb_cmd_satn(uint32_t val) "Set ATN (%2.2x)"
|
|
esp_mem_writeb_cmd_rstatn(uint32_t val) "Reset ATN (%2.2x)"
|
|
esp_mem_writeb_cmd_sel(uint32_t val) "Select without ATN (%2.2x)"
|
|
esp_mem_writeb_cmd_selatn(uint32_t val) "Select with ATN (%2.2x)"
|
|
esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (%2.2x)"
|
|
esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (%2.2x)"
|
|
esp_mem_writeb_cmd_dissel(uint32_t val) "Disable selection (%2.2x)"
|
|
|
|
# hw/scsi/esp-pci.c
|
|
esp_pci_error_invalid_dma_direction(void) "invalid DMA transfer direction"
|
|
esp_pci_error_invalid_read(uint32_t reg) "read access outside bounds (reg 0x%x)"
|
|
esp_pci_error_invalid_write(uint32_t reg) "write access outside bounds (reg 0x%x)"
|
|
esp_pci_error_invalid_write_dma(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]"
|
|
esp_pci_dma_read(uint32_t saddr, uint32_t reg) "reg[%d]: 0x%8.8x"
|
|
esp_pci_dma_write(uint32_t saddr, uint32_t reg, uint32_t val) "reg[%d]: 0x%8.8x -> 0x%8.8x"
|
|
esp_pci_dma_idle(uint32_t val) "IDLE (%.8x)"
|
|
esp_pci_dma_blast(uint32_t val) "BLAST (%.8x)"
|
|
esp_pci_dma_abort(uint32_t val) "ABORT (%.8x)"
|
|
esp_pci_dma_start(uint32_t val) "START (%.8x)"
|
|
esp_pci_sbac_read(uint32_t reg) "sbac: 0x%8.8x"
|
|
esp_pci_sbac_write(uint32_t reg, uint32_t val) "sbac: 0x%8.8x -> 0x%8.8x"
|
|
|
|
# monitor.c
|
|
handle_qmp_command(void *mon, const char *cmd_name) "mon %p cmd_name \"%s\""
|
|
monitor_protocol_emitter(void *mon) "mon %p"
|
|
monitor_protocol_event_handler(uint32_t event, void *qdict) "event=%d data=%p"
|
|
monitor_protocol_event_emit(uint32_t event, void *data) "event=%d data=%p"
|
|
monitor_protocol_event_queue(uint32_t event, void *qdict, uint64_t rate) "event=%d data=%p rate=%" PRId64
|
|
monitor_protocol_event_throttle(uint32_t event, uint64_t rate) "event=%d rate=%" PRId64
|
|
|
|
# hw/9pfs/virtio-9p.c
|
|
v9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d"
|
|
v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
|
|
v9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s"
|
|
v9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) "tag %u id %u fid %d afid %d uname %s aname %s"
|
|
v9fs_attach_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d type %d version %d path %"PRId64
|
|
v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
|
|
v9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) "tag %d id %d stat={mode %d atime %d mtime %d length %"PRId64"}"
|
|
v9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) "tag %d id %d fid %d request_mask %"PRIu64
|
|
v9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) "tag %d id %d getattr={result_mask %"PRId64" mode %u uid %u gid %u}"
|
|
v9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) "tag %d id %d fid %d newfid %d nwnames %d"
|
|
v9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) "tag %d id %d nwnames %d qids %p"
|
|
v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) "tag %d id %d fid %d mode %d"
|
|
v9fs_open_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
|
|
v9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %u"
|
|
v9fs_lcreate_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int32_t iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
|
|
v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) "tag %d id %d fid %d datasync %d"
|
|
v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
|
|
v9fs_read(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t max_count) "tag %d id %d fid %d off %"PRIu64" max_count %u"
|
|
v9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) "tag %d id %d count %d err %zd"
|
|
v9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, uint64_t offset, uint32_t max_count) "tag %d id %d fid %d offset %"PRIu64" max_count %u"
|
|
v9fs_readdir_return(uint16_t tag, uint8_t id, uint32_t count, ssize_t retval) "tag %d id %d count %u retval %zd"
|
|
v9fs_write(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t count, int cnt) "tag %d id %d fid %d off %"PRIu64" count %u cnt %d"
|
|
v9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) "tag %d id %d total %d err %zd"
|
|
v9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) "tag %d id %d fid %d name %s perm %d mode %d"
|
|
v9fs_create_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d"
|
|
v9fs_symlink(uint16_t tag, uint8_t id, int32_t fid, char* name, char* symname, uint32_t gid) "tag %d id %d fid %d name %s symname %s gid %u"
|
|
v9fs_symlink_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
|
|
v9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) "tag %d id %d flush_tag %d"
|
|
v9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) "tag %d id %d dfid %d oldfid %d name %s"
|
|
v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
|
|
v9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) "tag %u id %u fid %d stat={mode %d atime %d mtime %d}"
|
|
v9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) "tag %d id %d fid %d mode %d major %d minor %d"
|
|
v9fs_mknod_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}"
|
|
v9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) "tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64
|
|
v9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) "tag %d id %d status %d"
|
|
v9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length)"tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64
|
|
v9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) "tag %d id %d type %d start %"PRIu64" length %"PRIu64" proc_id %u"
|
|
v9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) "tag %u id %u fid %d name %s mode %d gid %u"
|
|
v9fs_mkdir_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int err) "tag %u id %u qid={type %d version %d path %"PRId64"} err %d"
|
|
v9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) "tag %d id %d fid %d newfid %d name %s"
|
|
v9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) "tag %d id %d size %"PRId64
|
|
v9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, int64_t size, int flags) "tag %d id %d fid %d name %s size %"PRId64" flags %d"
|
|
v9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d"
|
|
v9fs_readlink_return(uint16_t tag, uint8_t id, char* target) "tag %d id %d name %s"
|
|
|
|
# target-sparc/mmu_helper.c
|
|
mmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
|
|
mmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d"
|
|
mmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at %"PRIx64" context %"PRIx64
|
|
mmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at %"PRIx64" context %"PRIx64
|
|
mmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at %"PRIx64" context %"PRIx64
|
|
mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64
|
|
mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64
|
|
mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64
|
|
|
|
# target-sparc/int64_helper.c
|
|
int_helper_set_softint(uint32_t softint) "new %08x"
|
|
int_helper_clear_softint(uint32_t softint) "new %08x"
|
|
int_helper_write_softint(uint32_t softint) "new %08x"
|
|
|
|
# target-sparc/int32_helper.c
|
|
int_helper_icache_freeze(void) "Instruction cache: freeze"
|
|
int_helper_dcache_freeze(void) "Data cache: freeze"
|
|
|
|
# target-sparc/win_helper.c
|
|
win_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=%x"
|
|
win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=%x new=%x"
|
|
win_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=%x (unchanged)"
|
|
win_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=%x new=%x"
|
|
win_helper_done(uint32_t tl) "tl=%d"
|
|
win_helper_retry(uint32_t tl) "tl=%d"
|
|
|
|
# dma-helpers.c
|
|
dma_blk_io(void *dbs, void *bs, int64_t offset, bool to_dev) "dbs=%p bs=%p offset=%" PRId64 " to_dev=%d"
|
|
dma_aio_cancel(void *dbs) "dbs=%p"
|
|
dma_complete(void *dbs, int ret, void *cb) "dbs=%p ret=%d cb=%p"
|
|
dma_blk_cb(void *dbs, int ret) "dbs=%p ret=%d"
|
|
dma_map_wait(void *dbs) "dbs=%p"
|
|
|
|
# ui/console.c
|
|
console_gfx_new(void) ""
|
|
console_putchar_csi(int esc_param0, int esc_param1, int ch, int nb_esc_params) "escape sequence CSI%d;%d%c, %d parameters"
|
|
console_putchar_unhandled(int ch) "unhandled escape character '%c'"
|
|
console_txt_new(int w, int h) "%dx%d"
|
|
console_select(int nr) "%d"
|
|
console_refresh(int interval) "interval %d ms"
|
|
displaysurface_create(void *display_surface, int w, int h) "surface=%p, %dx%d"
|
|
displaysurface_create_from(void *display_surface, int w, int h, uint32_t format) "surface=%p, %dx%d, format 0x%x"
|
|
displaysurface_create_pixman(void *display_surface) "surface=%p"
|
|
displaysurface_free(void *display_surface) "surface=%p"
|
|
displaychangelistener_register(void *dcl, const char *name) "%p [ %s ]"
|
|
displaychangelistener_unregister(void *dcl, const char *name) "%p [ %s ]"
|
|
ppm_save(const char *filename, void *display_surface) "%s surface=%p"
|
|
|
|
# ui/gtk.c
|
|
gd_switch(const char *tab, int width, int height) "tab=%s, width=%d, height=%d"
|
|
gd_update(const char *tab, int x, int y, int w, int h) "tab=%s, x=%d, y=%d, w=%d, h=%d"
|
|
gd_key_event(const char *tab, int gdk_keycode, int qemu_keycode, const char *action) "tab=%s, translated GDK keycode %d to QEMU keycode %d (%s)"
|
|
gd_grab(const char *tab, const char *device, const char *reason) "tab=%s, dev=%s, reason=%s"
|
|
gd_ungrab(const char *tab, const char *device) "tab=%s, dev=%s"
|
|
|
|
# ui/vnc.c
|
|
vnc_key_guest_leds(bool caps, bool num, bool scroll) "caps %d, num %d, scroll %d"
|
|
vnc_key_map_init(const char *layout) "%s"
|
|
vnc_key_event_ext(bool down, int sym, int keycode, const char *name) "down %d, sym 0x%x, keycode 0x%x [%s]"
|
|
vnc_key_event_map(bool down, int sym, int keycode, const char *name) "down %d, sym 0x%x -> keycode 0x%x [%s]"
|
|
vnc_key_sync_numlock(bool on) "%d"
|
|
vnc_key_sync_capslock(bool on) "%d"
|
|
|
|
# ui/input.c
|
|
input_event_key_number(int conidx, int number, const char *qcode, bool down) "con %d, key number 0x%x [%s], down %d"
|
|
input_event_key_qcode(int conidx, const char *qcode, bool down) "con %d, key qcode %s, down %d"
|
|
input_event_btn(int conidx, const char *btn, bool down) "con %d, button %s, down %d"
|
|
input_event_rel(int conidx, const char *axis, int value) "con %d, axis %s, value %d"
|
|
input_event_abs(int conidx, const char *axis, int value) "con %d, axis %s, value 0x%x"
|
|
input_event_sync(void) ""
|
|
input_mouse_mode(int absolute) "absolute %d"
|
|
|
|
# hw/display/vmware_vga.c
|
|
vmware_value_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
|
|
vmware_value_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
|
|
vmware_palette_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
|
|
vmware_palette_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
|
|
vmware_scratch_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
|
|
vmware_scratch_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
|
|
vmware_setmode(uint32_t w, uint32_t h, uint32_t bpp) "%dx%d @ %d bpp"
|
|
|
|
# hw/display/virtio-gpu.c
|
|
virtio_gpu_features(bool virgl) "virgl %d"
|
|
virtio_gpu_cmd_get_display_info(void) ""
|
|
virtio_gpu_cmd_get_caps(void) ""
|
|
virtio_gpu_cmd_set_scanout(uint32_t id, uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "id %d, res 0x%x, w %d, h %d, x %d, y %d"
|
|
virtio_gpu_cmd_res_create_2d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h) "res 0x%x, fmt 0x%x, w %d, h %d"
|
|
virtio_gpu_cmd_res_create_3d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h, uint32_t d) "res 0x%x, fmt 0x%x, w %d, h %d, d %d"
|
|
virtio_gpu_cmd_res_unref(uint32_t res) "res 0x%x"
|
|
virtio_gpu_cmd_res_back_attach(uint32_t res) "res 0x%x"
|
|
virtio_gpu_cmd_res_back_detach(uint32_t res) "res 0x%x"
|
|
virtio_gpu_cmd_res_xfer_toh_2d(uint32_t res) "res 0x%x"
|
|
virtio_gpu_cmd_res_xfer_toh_3d(uint32_t res) "res 0x%x"
|
|
virtio_gpu_cmd_res_xfer_fromh_3d(uint32_t res) "res 0x%x"
|
|
virtio_gpu_cmd_res_flush(uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "res 0x%x, w %d, h %d, x %d, y %d"
|
|
virtio_gpu_cmd_ctx_create(uint32_t ctx, const char *name) "ctx 0x%x, name %s"
|
|
virtio_gpu_cmd_ctx_destroy(uint32_t ctx) "ctx 0x%x"
|
|
virtio_gpu_cmd_ctx_res_attach(uint32_t ctx, uint32_t res) "ctx 0x%x, res 0x%x"
|
|
virtio_gpu_cmd_ctx_res_detach(uint32_t ctx, uint32_t res) "ctx 0x%x, res 0x%x"
|
|
virtio_gpu_cmd_ctx_submit(uint32_t ctx, uint32_t size) "ctx 0x%x, size %d"
|
|
virtio_gpu_update_cursor(uint32_t scanout, uint32_t x, uint32_t y, const char *type, uint32_t res) "scanout %d, x %d, y %d, %s, res 0x%x"
|
|
virtio_gpu_fence_ctrl(uint64_t fence, uint32_t type) "fence 0x%" PRIx64 ", type 0x%x"
|
|
virtio_gpu_fence_resp(uint64_t fence) "fence 0x%" PRIx64
|
|
|
|
# hw/display/qxl.c
|
|
disable qxl_interface_set_mm_time(int qid, uint32_t mm_time) "%d %d"
|
|
disable qxl_io_write_vga(int qid, const char *mode, uint32_t addr, uint32_t val) "%d %s addr=%u val=%u"
|
|
qxl_create_guest_primary(int qid, uint32_t width, uint32_t height, uint64_t mem, uint32_t format, uint32_t position) "%d %ux%u mem=%" PRIx64 " %u,%u"
|
|
qxl_create_guest_primary_rest(int qid, int32_t stride, uint32_t type, uint32_t flags) "%d %d,%d,%d"
|
|
qxl_destroy_primary(int qid) "%d"
|
|
qxl_enter_vga_mode(int qid) "%d"
|
|
qxl_exit_vga_mode(int qid) "%d"
|
|
qxl_hard_reset(int qid, int64_t loadvm) "%d loadvm=%"PRId64
|
|
qxl_interface_async_complete_io(int qid, uint32_t current_async, void *cookie) "%d current=%d cookie=%p"
|
|
qxl_interface_attach_worker(int qid) "%d"
|
|
qxl_interface_get_init_info(int qid) "%d"
|
|
qxl_interface_set_compression_level(int qid, int64_t level) "%d %"PRId64
|
|
qxl_interface_update_area_complete(int qid, uint32_t surface_id, uint32_t dirty_left, uint32_t dirty_right, uint32_t dirty_top, uint32_t dirty_bottom) "%d surface=%d [%d,%d,%d,%d]"
|
|
qxl_interface_update_area_complete_rest(int qid, uint32_t num_updated_rects) "%d #=%d"
|
|
qxl_interface_update_area_complete_overflow(int qid, int max) "%d max=%d"
|
|
qxl_interface_update_area_complete_schedule_bh(int qid, uint32_t num_dirty) "%d #dirty=%d"
|
|
qxl_io_destroy_primary_ignored(int qid, const char *mode) "%d %s"
|
|
qxl_io_log(int qid, const uint8_t *log_buf) "%d %s"
|
|
qxl_io_read_unexpected(int qid) "%d"
|
|
qxl_io_unexpected_vga_mode(int qid, uint64_t addr, uint64_t val, const char *desc) "%d 0x%"PRIx64"=%"PRIu64" (%s)"
|
|
qxl_io_write(int qid, const char *mode, uint64_t addr, const char *aname, uint64_t val, unsigned size, int async) "%d %s addr=%"PRIu64 " (%s) val=%"PRIu64" size=%u async=%d"
|
|
qxl_memslot_add_guest(int qid, uint32_t slot_id, uint64_t guest_start, uint64_t guest_end) "%d %u: guest phys 0x%"PRIx64 " - 0x%" PRIx64
|
|
qxl_post_load(int qid, const char *mode) "%d %s"
|
|
qxl_pre_load(int qid) "%d"
|
|
qxl_pre_save(int qid) "%d"
|
|
qxl_reset_surfaces(int qid) "%d"
|
|
qxl_ring_command_check(int qid, const char *mode) "%d %s"
|
|
qxl_ring_command_get(int qid, const char *mode) "%d %s"
|
|
qxl_ring_command_req_notification(int qid) "%d"
|
|
qxl_ring_cursor_check(int qid, const char *mode) "%d %s"
|
|
qxl_ring_cursor_get(int qid, const char *mode) "%d %s"
|
|
qxl_ring_cursor_req_notification(int qid) "%d"
|
|
qxl_ring_res_push(int qid, const char *mode, uint32_t surface_count, uint32_t free_res, void *last_release, const char *notify) "%d %s s#=%d res#=%d last=%p notify=%s"
|
|
qxl_ring_res_push_rest(int qid, uint32_t ring_has, uint32_t ring_size, uint32_t prod, uint32_t cons) "%d ring %d/%d [%d,%d]"
|
|
qxl_ring_res_put(int qid, uint32_t free_res) "%d #res=%d"
|
|
qxl_set_mode(int qid, int modenr, uint32_t x_res, uint32_t y_res, uint32_t bits, uint64_t devmem) "%d mode=%d [ x=%d y=%d @ bpp=%d devmem=0x%" PRIx64 " ]"
|
|
qxl_soft_reset(int qid) "%d"
|
|
qxl_spice_destroy_surfaces_complete(int qid) "%d"
|
|
qxl_spice_destroy_surfaces(int qid, int async) "%d async=%d"
|
|
qxl_spice_destroy_surface_wait_complete(int qid, uint32_t id) "%d sid=%d"
|
|
qxl_spice_destroy_surface_wait(int qid, uint32_t id, int async) "%d sid=%d async=%d"
|
|
qxl_spice_flush_surfaces_async(int qid, uint32_t surface_count, uint32_t num_free_res) "%d s#=%d, res#=%d"
|
|
qxl_spice_monitors_config(int qid) "%d"
|
|
qxl_spice_loadvm_commands(int qid, void *ext, uint32_t count) "%d ext=%p count=%d"
|
|
qxl_spice_oom(int qid) "%d"
|
|
qxl_spice_reset_cursor(int qid) "%d"
|
|
qxl_spice_reset_image_cache(int qid) "%d"
|
|
qxl_spice_reset_memslots(int qid) "%d"
|
|
qxl_spice_update_area(int qid, uint32_t surface_id, uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "%d sid=%d [%d,%d,%d,%d]"
|
|
qxl_spice_update_area_rest(int qid, uint32_t num_dirty_rects, uint32_t clear_dirty_region) "%d #d=%d clear=%d"
|
|
qxl_surfaces_dirty(int qid, int surface, int offset, int size) "%d surface=%d offset=%d size=%d"
|
|
qxl_send_events(int qid, uint32_t events) "%d %d"
|
|
qxl_send_events_vm_stopped(int qid, uint32_t events) "%d %d"
|
|
qxl_set_guest_bug(int qid) "%d"
|
|
qxl_interrupt_client_monitors_config(int qid, int num_heads, void *heads) "%d %d %p"
|
|
qxl_client_monitors_config_unsupported_by_guest(int qid, uint32_t int_mask, void *client_monitors_config) "%d %X %p"
|
|
qxl_client_monitors_config_unsupported_by_device(int qid, int revision) "%d revision=%d"
|
|
qxl_client_monitors_config_capped(int qid, int requested, int limit) "%d %d %d"
|
|
qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) "%d %u %u"
|
|
qxl_set_client_capabilities_unsupported_by_revision(int qid, int revision) "%d revision=%d"
|
|
|
|
# ui/spice-display.c
|
|
qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) "%d %u: host virt 0x%lx - 0x%lx async=%d"
|
|
qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) "%d gid=%u sid=%u"
|
|
qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) "%d sid=%u surface=%p async=%d"
|
|
qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) "%d sid=%u async=%d"
|
|
qemu_spice_wakeup(uint32_t qid) "%d"
|
|
qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d, tb -> %d -> %d"
|
|
|
|
# hw/display/qxl-render.c
|
|
qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]"
|
|
qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d"
|
|
qxl_render_update_area_done(void *cookie) "%p"
|
|
|
|
# hw/ppc/spapr_pci.c
|
|
spapr_pci_msi(const char *msg, uint32_t ca) "%s (cfg=%x)"
|
|
spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=%"PRIx64
|
|
spapr_pci_rtas_ibm_change_msi(unsigned cfg, unsigned func, unsigned req, unsigned first) "cfgaddr %x func %u, requested %u, first irq %u"
|
|
spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) "queries for #%u, IRQ%u"
|
|
spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@%"PRIx64"<=%"PRIx64" IRQ %u"
|
|
spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u"
|
|
spapr_pci_msi_retry(unsigned config_addr, unsigned req_num, unsigned max_irqs) "Guest device at %x asked %u, have only %u"
|
|
|
|
# hw/pci/pci.c
|
|
pci_update_mappings_del(void *d, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,%#"PRIx64"+%#"PRIx64
|
|
pci_update_mappings_add(void *d, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,%#"PRIx64"+%#"PRIx64
|
|
|
|
# hw/ppc/spapr.c
|
|
spapr_cas_failed(unsigned long n) "DT diff buffer is too small: %ld bytes"
|
|
spapr_cas_continue(unsigned long n) "Copy changes to the guest: %ld bytes"
|
|
|
|
# hw/ppc/spapr_hcall.c
|
|
spapr_cas_pvr_try(uint32_t pvr) "%x"
|
|
spapr_cas_pvr(uint32_t cur_pvr, bool cpu_match, uint32_t new_pvr, uint64_t pcr) "current=%x, cpu_match=%u, new=%x, compat flags=%"PRIx64
|
|
|
|
# hw/ppc/spapr_iommu.c
|
|
spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64
|
|
spapr_iommu_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64
|
|
spapr_iommu_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64
|
|
spapr_iommu_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64
|
|
spapr_iommu_pci_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64
|
|
spapr_iommu_pci_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64
|
|
spapr_iommu_pci_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64
|
|
spapr_iommu_pci_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64
|
|
spapr_iommu_xlate(uint64_t liobn, uint64_t ioba, uint64_t tce, unsigned perm, unsigned pgsize) "liobn=%"PRIx64" 0x%"PRIx64" -> 0x%"PRIx64" perm=%u mask=%x"
|
|
spapr_iommu_new_table(uint64_t liobn, void *table, int fd) "liobn=%"PRIx64" table=%p fd=%d"
|
|
spapr_iommu_pre_save(uint64_t liobn, uint32_t nb, uint64_t offs, uint32_t ps) "liobn=%"PRIx64" %"PRIx32" bus_offset=%"PRIx64" ps=%"PRIu32
|
|
spapr_iommu_post_load(uint64_t liobn, uint32_t pre_nb, uint32_t post_nb, uint64_t offs, uint32_t ps) "liobn=%"PRIx64" %"PRIx32" => %"PRIx32" bus_offset=%"PRIx64" ps=%"PRIu32
|
|
|
|
# hw/ppc/ppc.c
|
|
ppc_tb_adjust(uint64_t offs1, uint64_t offs2, int64_t diff, int64_t seconds) "adjusted from 0x%"PRIx64" to 0x%"PRIx64", diff %"PRId64" (%"PRId64"s)"
|
|
|
|
# hw/ppc/prep.c
|
|
prep_io_800_writeb(uint32_t addr, uint32_t val) "0x%08" PRIx32 " => 0x%02" PRIx32
|
|
prep_io_800_readb(uint32_t addr, uint32_t retval) "0x%08" PRIx32 " <= 0x%02" PRIx32
|
|
|
|
# target-s390x/mmu_helper.c
|
|
get_skeys_nonzero(int rc) "SKEY: Call to get_skeys unexpectedly returned %d"
|
|
set_skeys_nonzero(int rc) "SKEY: Call to set_skeys unexpectedly returned %d"
|
|
|
|
# target-s390x/ioinst.c
|
|
ioinst(const char *insn) "IOINST: %s"
|
|
ioinst_sch_id(const char *insn, int cssid, int ssid, int schid) "IOINST: %s (%x.%x.%04x)"
|
|
ioinst_chp_id(const char *insn, int cssid, int chpid) "IOINST: %s (%x.%02x)"
|
|
ioinst_chsc_cmd(uint16_t cmd, uint16_t len) "IOINST: chsc command %04x, len %04x"
|
|
|
|
# hw/s390x/css.c
|
|
css_enable_facility(const char *facility) "CSS: enable %s"
|
|
css_crw(uint8_t rsc, uint8_t erc, uint16_t rsid, const char *chained) "CSS: queueing crw: rsc=%x, erc=%x, rsid=%x %s"
|
|
css_chpid_add(uint8_t cssid, uint8_t chpid, uint8_t type) "CSS: add chpid %x.%02x (type %02x)"
|
|
css_new_image(uint8_t cssid, const char *default_cssid) "CSS: add css image %02x %s"
|
|
css_assign_subch(const char *do_assign, uint8_t cssid, uint8_t ssid, uint16_t schid, uint16_t devno) "CSS: %s %x.%x.%04x (devno %04x)"
|
|
css_io_interrupt(int cssid, int ssid, int schid, uint32_t intparm, uint8_t isc, const char *conditional) "CSS: I/O interrupt on sch %x.%x.%04x (intparm %08x, isc %x) %s"
|
|
css_adapter_interrupt(uint8_t isc) "CSS: adapter I/O interrupt (isc %x)"
|
|
|
|
# hw/s390x/virtio-ccw.c
|
|
virtio_ccw_interpret_ccw(int cssid, int ssid, int schid, int cmd_code) "VIRTIO-CCW: %x.%x.%04x: interpret command %x"
|
|
virtio_ccw_new_device(int cssid, int ssid, int schid, int devno, const char *devno_mode) "VIRTIO-CCW: add subchannel %x.%x.%04x, devno %04x (%s)"
|
|
virtio_ccw_set_ind(uint64_t ind_loc, uint8_t ind_old, uint8_t ind_new) "VIRTIO-CCW: indicator at %" PRIu64 ": %x->%x"
|
|
|
|
# kvm-all.c
|
|
kvm_ioctl(int type, void *arg) "type 0x%x, arg %p"
|
|
kvm_vm_ioctl(int type, void *arg) "type 0x%x, arg %p"
|
|
kvm_vcpu_ioctl(int cpu_index, int type, void *arg) "cpu_index %d, type 0x%x, arg %p"
|
|
kvm_run_exit(int cpu_index, uint32_t reason) "cpu_index %d, reason %d"
|
|
kvm_device_ioctl(int fd, int type, void *arg) "dev fd %d, type 0x%x, arg %p"
|
|
kvm_failed_reg_get(uint64_t id, const char *msg) "Warning: Unable to retrieve ONEREG %" PRIu64 " from KVM: %s"
|
|
kvm_failed_reg_set(uint64_t id, const char *msg) "Warning: Unable to set ONEREG %" PRIu64 " to KVM: %s"
|
|
|
|
# target-ppc/kvm.c
|
|
kvm_failed_spr_set(int str, const char *msg) "Warning: Unable to set SPR %d to KVM: %s"
|
|
kvm_failed_spr_get(int str, const char *msg) "Warning: Unable to retrieve SPR %d from KVM: %s"
|
|
|
|
# TCG related tracing (mostly disabled by default)
|
|
# cpu-exec.c
|
|
disable exec_tb(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR
|
|
disable exec_tb_nocache(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR
|
|
disable exec_tb_exit(void *last_tb, unsigned int flags) "tb:%p flags=%x"
|
|
|
|
# translate-all.c
|
|
translate_block(void *tb, uintptr_t pc, uint8_t *tb_code) "tb:%p, pc:0x%"PRIxPTR", tb_code:%p"
|
|
|
|
# memory.c
|
|
memory_region_ops_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr %#"PRIx64" value %#"PRIx64" size %u"
|
|
memory_region_ops_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr %#"PRIx64" value %#"PRIx64" size %u"
|
|
memory_region_subpage_read(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset %#"PRIx64" value %#"PRIx64" size %u"
|
|
memory_region_subpage_write(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset %#"PRIx64" value %#"PRIx64" size %u"
|
|
memory_region_tb_read(int cpu_index, uint64_t addr, uint64_t value, unsigned size) "cpu %d addr %#"PRIx64" value %#"PRIx64" size %u"
|
|
memory_region_tb_write(int cpu_index, uint64_t addr, uint64_t value, unsigned size) "cpu %d addr %#"PRIx64" value %#"PRIx64" size %u"
|
|
|
|
# qom/object.c
|
|
object_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)"
|
|
object_class_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)"
|
|
|
|
# hw/i386/xen/xen_pvdevice.c
|
|
xen_pv_mmio_read(uint64_t addr) "WARNING: read from Xen PV Device MMIO space (address %"PRIx64")"
|
|
xen_pv_mmio_write(uint64_t addr) "WARNING: write to Xen PV Device MMIO space (address %"PRIx64")"
|
|
|
|
# hw/pci/pci_host.c
|
|
pci_cfg_read(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x -> 0x%x"
|
|
pci_cfg_write(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x <- 0x%x"
|
|
|
|
# hw/vfio/pci.c
|
|
vfio_intx_interrupt(const char *name, char line) " (%s) Pin %c"
|
|
vfio_intx_eoi(const char *name) " (%s) EOI"
|
|
vfio_intx_enable_kvm(const char *name) " (%s) KVM INTx accel enabled"
|
|
vfio_intx_disable_kvm(const char *name) " (%s) KVM INTx accel disabled"
|
|
vfio_intx_update(const char *name, int new_irq, int target_irq) " (%s) IRQ moved %d -> %d"
|
|
vfio_intx_enable(const char *name) " (%s)"
|
|
vfio_intx_disable(const char *name) " (%s)"
|
|
vfio_msi_interrupt(const char *name, int index, uint64_t addr, int data) " (%s) vector %d 0x%"PRIx64"/0x%x"
|
|
vfio_msix_vector_do_use(const char *name, int index) " (%s) vector %d used"
|
|
vfio_msix_vector_release(const char *name, int index) " (%s) vector %d released"
|
|
vfio_msix_enable(const char *name) " (%s)"
|
|
vfio_msix_pba_disable(const char *name) " (%s)"
|
|
vfio_msix_pba_enable(const char *name) " (%s)"
|
|
vfio_msix_disable(const char *name) " (%s)"
|
|
vfio_msix_fixup(const char *name, int bar, uint64_t start, uint64_t end) " (%s) MSI-X region %d mmap fixup [0x%"PRIx64" - 0x%"PRIx64"]"
|
|
vfio_msi_enable(const char *name, int nr_vectors) " (%s) Enabled %d MSI vectors"
|
|
vfio_msi_disable(const char *name) " (%s)"
|
|
vfio_pci_load_rom(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device %s ROM:\n size: 0x%lx, offset: 0x%lx, flags: 0x%lx"
|
|
vfio_rom_read(const char *name, uint64_t addr, int size, uint64_t data) " (%s, 0x%"PRIx64", 0x%x) = 0x%"PRIx64
|
|
vfio_pci_size_rom(const char *name, int size) "%s ROM size 0x%x"
|
|
vfio_vga_write(uint64_t addr, uint64_t data, int size) " (0x%"PRIx64", 0x%"PRIx64", %d)"
|
|
vfio_vga_read(uint64_t addr, int size, uint64_t data) " (0x%"PRIx64", %d) = 0x%"PRIx64
|
|
vfio_pci_read_config(const char *name, int addr, int len, int val) " (%s, @0x%x, len=0x%x) %x"
|
|
vfio_pci_write_config(const char *name, int addr, int val, int len) " (%s, @0x%x, 0x%x, len=0x%x)"
|
|
vfio_msi_setup(const char *name, int pos) "%s PCI MSI CAP @0x%x"
|
|
vfio_msix_early_setup(const char *name, int pos, int table_bar, int offset, int entries) "%s PCI MSI-X CAP @0x%x, BAR %d, offset 0x%x, entries %d"
|
|
vfio_check_pcie_flr(const char *name) "%s Supports FLR via PCIe cap"
|
|
vfio_check_pm_reset(const char *name) "%s Supports PM reset"
|
|
vfio_check_af_flr(const char *name) "%s Supports FLR via AF cap"
|
|
vfio_pci_hot_reset(const char *name, const char *type) " (%s) %s"
|
|
vfio_pci_hot_reset_has_dep_devices(const char *name) "%s: hot reset dependent devices:"
|
|
vfio_pci_hot_reset_dep_devices(int domain, int bus, int slot, int function, int group_id) "\t%04x:%02x:%02x.%x group %d"
|
|
vfio_pci_hot_reset_result(const char *name, const char *result) "%s hot reset: %s"
|
|
vfio_populate_device_config(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device %s config:\n size: 0x%lx, offset: 0x%lx, flags: 0x%lx"
|
|
vfio_populate_device_get_irq_info_failure(void) "VFIO_DEVICE_GET_IRQ_INFO failure: %m"
|
|
vfio_initfn(const char *name, int group_id) " (%s) group %d"
|
|
vfio_pci_reset(const char *name) " (%s)"
|
|
vfio_pci_reset_flr(const char *name) "%s FLR/VFIO_DEVICE_RESET"
|
|
vfio_pci_reset_pm(const char *name) "%s PCI PM Reset"
|
|
vfio_pci_emulated_vendor_id(const char *name, uint16_t val) "%s %04x"
|
|
vfio_pci_emulated_device_id(const char *name, uint16_t val) "%s %04x"
|
|
vfio_pci_emulated_sub_vendor_id(const char *name, uint16_t val) "%s %04x"
|
|
vfio_pci_emulated_sub_device_id(const char *name, uint16_t val) "%s %04x"
|
|
|
|
# hw/vfio/pci-quirks.
|
|
vfio_quirk_rom_blacklisted(const char *name, uint16_t vid, uint16_t did) "%s %04x:%04x"
|
|
vfio_quirk_generic_window_address_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64
|
|
vfio_quirk_generic_window_data_read(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64
|
|
vfio_quirk_generic_window_data_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64
|
|
vfio_quirk_generic_mirror_read(const char *name, const char * region_name, uint64_t addr, uint64_t data) "%s %s 0x%"PRIx64": 0x%"PRIx64
|
|
vfio_quirk_generic_mirror_write(const char *name, const char * region_name, uint64_t addr, uint64_t data) "%s %s 0x%"PRIx64": 0x%"PRIx64
|
|
vfio_quirk_ati_3c3_read(const char *name, uint64_t data) "%s 0x%"PRIx64
|
|
vfio_quirk_ati_3c3_probe(const char *name) "%s"
|
|
vfio_quirk_ati_bar4_probe(const char *name) "%s"
|
|
vfio_quirk_ati_bar2_probe(const char *name) "%s"
|
|
vfio_quirk_nvidia_3d0_state(const char *name, const char *state) "%s %s"
|
|
vfio_quirk_nvidia_3d0_read(const char *name, uint8_t offset, unsigned size, uint64_t val) " (%s, @0x%x, len=0x%x) %"PRIx64
|
|
vfio_quirk_nvidia_3d0_write(const char *name, uint8_t offset, uint64_t data, unsigned size) "(%s, @0x%x, 0x%"PRIx64", len=0x%x)"
|
|
vfio_quirk_nvidia_3d0_probe(const char *name) "%s"
|
|
vfio_quirk_nvidia_bar5_state(const char *name, const char *state) "%s %s"
|
|
vfio_quirk_nvidia_bar5_probe(const char *name) "%s"
|
|
vfio_quirk_nvidia_bar0_msi_ack(const char *name) "%s"
|
|
vfio_quirk_nvidia_bar0_probe(const char *name) "%s"
|
|
vfio_quirk_rtl8168_fake_latch(const char *name, uint64_t val) "%s 0x%"PRIx64
|
|
vfio_quirk_rtl8168_msix_write(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table write[0x%x]: 0x%"PRIx64
|
|
vfio_quirk_rtl8168_msix_read(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table read[0x%x]: 0x%"PRIx64
|
|
vfio_quirk_rtl8168_probe(const char *name) "%s"
|
|
|
|
vfio_quirk_ati_bonaire_reset_skipped(const char *name) "%s"
|
|
vfio_quirk_ati_bonaire_reset_no_smc(const char *name) "%s"
|
|
vfio_quirk_ati_bonaire_reset_timeout(const char *name) "%s"
|
|
vfio_quirk_ati_bonaire_reset_done(const char *name) "%s"
|
|
vfio_quirk_ati_bonaire_reset(const char *name) "%s"
|
|
vfio_pci_igd_bar4_write(const char *name, uint32_t index, uint32_t data, uint32_t base) "%s [%03x] %08x -> %08x"
|
|
vfio_pci_igd_bdsm_enabled(const char *name, int size) "%s %dMB"
|
|
vfio_pci_igd_opregion_enabled(const char *name) "%s"
|
|
vfio_pci_igd_host_bridge_enabled(const char *name) "%s"
|
|
vfio_pci_igd_lpc_bridge_enabled(const char *name) "%s"
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|
|
# hw/vfio/common.c
|
|
vfio_region_write(const char *name, int index, uint64_t addr, uint64_t data, unsigned size) " (%s:region%d+0x%"PRIx64", 0x%"PRIx64 ", %d)"
|
|
vfio_region_read(char *name, int index, uint64_t addr, unsigned size, uint64_t data) " (%s:region%d+0x%"PRIx64", %d) = 0x%"PRIx64
|
|
vfio_iommu_map_notify(uint64_t iova_start, uint64_t iova_end) "iommu map @ %"PRIx64" - %"PRIx64
|
|
vfio_listener_region_add_skip(uint64_t start, uint64_t end) "SKIPPING region_add %"PRIx64" - %"PRIx64
|
|
vfio_listener_region_add_iommu(uint64_t start, uint64_t end) "region_add [iommu] %"PRIx64" - %"PRIx64
|
|
vfio_listener_region_add_ram(uint64_t iova_start, uint64_t iova_end, void *vaddr) "region_add [ram] %"PRIx64" - %"PRIx64" [%p]"
|
|
vfio_listener_region_del_skip(uint64_t start, uint64_t end) "SKIPPING region_del %"PRIx64" - %"PRIx64
|
|
vfio_listener_region_del(uint64_t start, uint64_t end) "region_del %"PRIx64" - %"PRIx64
|
|
vfio_disconnect_container(int fd) "close container->fd=%d"
|
|
vfio_put_group(int fd) "close group->fd=%d"
|
|
vfio_get_device(const char * name, unsigned int flags, unsigned int num_regions, unsigned int num_irqs) "Device %s flags: %u, regions: %u, irqs: %u"
|
|
vfio_put_base_device(int fd) "close vdev->fd=%d"
|
|
vfio_region_setup(const char *dev, int index, const char *name, unsigned long flags, unsigned long offset, unsigned long size) "Device %s, region %d \"%s\", flags: %lx, offset: %lx, size: %lx"
|
|
vfio_region_mmap_fault(const char *name, int index, unsigned long offset, unsigned long size, int fault) "Region %s mmaps[%d], [%lx - %lx], fault: %d"
|
|
vfio_region_mmap(const char *name, unsigned long offset, unsigned long end) "Region %s [%lx - %lx]"
|
|
vfio_region_exit(const char *name, int index) "Device %s, region %d"
|
|
vfio_region_finalize(const char *name, int index) "Device %s, region %d"
|
|
vfio_region_mmaps_set_enabled(const char *name, bool enabled) "Region %s mmaps enabled: %d"
|
|
vfio_region_sparse_mmap_header(const char *name, int index, int nr_areas) "Device %s region %d: %d sparse mmap entries"
|
|
vfio_region_sparse_mmap_entry(int i, unsigned long start, unsigned long end) "sparse entry %d [0x%lx - 0x%lx]"
|
|
vfio_get_dev_region(const char *name, int index, uint32_t type, uint32_t subtype) "%s index %d, %08x/%0x8"
|
|
|
|
# hw/vfio/platform.c
|
|
vfio_platform_base_device_init(char *name, int groupid) "%s belongs to group #%d"
|
|
vfio_platform_realize(char *name, char *compat) "vfio device %s, compat = %s"
|
|
vfio_platform_eoi(int pin, int fd) "EOI IRQ pin %d (fd=%d)"
|
|
vfio_platform_intp_mmap_enable(int pin) "IRQ #%d still active, stay in slow path"
|
|
vfio_platform_intp_interrupt(int pin, int fd) "Inject IRQ #%d (fd = %d)"
|
|
vfio_platform_intp_inject_pending_lockheld(int pin, int fd) "Inject pending IRQ #%d (fd = %d)"
|
|
vfio_platform_populate_interrupts(int pin, int count, int flags) "- IRQ index %d: count %d, flags=0x%x"
|
|
vfio_intp_interrupt_set_pending(int index) "irq %d is set PENDING"
|
|
vfio_platform_start_level_irqfd_injection(int index, int fd, int resamplefd) "IRQ index=%d, fd = %d, resamplefd = %d"
|
|
vfio_platform_start_edge_irqfd_injection(int index, int fd) "IRQ index=%d, fd = %d"
|
|
|
|
|
|
#hw/acpi/memory_hotplug.c
|
|
mhp_acpi_invalid_slot_selected(uint32_t slot) "0x%"PRIx32
|
|
mhp_acpi_ejecting_invalid_slot(uint32_t slot) "0x%"PRIx32
|
|
mhp_acpi_read_addr_lo(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr lo: 0x%"PRIx32
|
|
mhp_acpi_read_addr_hi(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr hi: 0x%"PRIx32
|
|
mhp_acpi_read_size_lo(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size lo: 0x%"PRIx32
|
|
mhp_acpi_read_size_hi(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size hi: 0x%"PRIx32
|
|
mhp_acpi_read_pxm(uint32_t slot, uint32_t pxm) "slot[0x%"PRIx32"] proximity: 0x%"PRIx32
|
|
mhp_acpi_read_flags(uint32_t slot, uint32_t flags) "slot[0x%"PRIx32"] flags: 0x%"PRIx32
|
|
mhp_acpi_write_slot(uint32_t slot) "set active slot: 0x%"PRIx32
|
|
mhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "slot[0x%"PRIx32"] OST EVENT: 0x%"PRIx32
|
|
mhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "slot[0x%"PRIx32"] OST STATUS: 0x%"PRIx32
|
|
mhp_acpi_clear_insert_evt(uint32_t slot) "slot[0x%"PRIx32"] clear insert event"
|
|
mhp_acpi_clear_remove_evt(uint32_t slot) "slot[0x%"PRIx32"] clear remove event"
|
|
mhp_acpi_pc_dimm_deleted(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm deleted"
|
|
mhp_acpi_pc_dimm_delete_failed(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm delete failed"
|
|
|
|
# hw/i386/pc.c
|
|
mhp_pc_dimm_assigned_slot(int slot) "0x%d"
|
|
mhp_pc_dimm_assigned_address(uint64_t addr) "0x%"PRIx64
|
|
|
|
# target-s390x/kvm.c
|
|
kvm_enable_cmma(int rc) "CMMA: enabling with result code %d"
|
|
kvm_clear_cmma(int rc) "CMMA: clearing with result code %d"
|
|
kvm_failed_cpu_state_set(int cpu_index, uint8_t state, const char *msg) "Warning: Unable to set cpu %d state %" PRIu8 " to KVM: %s"
|
|
kvm_sigp_finished(uint8_t order, int cpu_index, int dst_index, int cc) "SIGP: Finished order %u on cpu %d -> cpu %d with cc=%d"
|
|
|
|
# hw/dma/i8257.c
|
|
i8257_unregistered_dma(int nchan, int dma_pos, int dma_len) "unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d"
|
|
|
|
# target-s390x/cpu.c
|
|
cpu_set_state(int cpu_index, uint8_t state) "setting cpu %d state to %" PRIu8
|
|
cpu_halt(int cpu_index) "halting cpu %d"
|
|
cpu_unhalt(int cpu_index) "unhalting cpu %d"
|
|
|
|
# hw/arm/virt-acpi-build.c
|
|
virt_acpi_setup(void) "No fw cfg or ACPI disabled. Bailing out."
|
|
|
|
# hw/alpha/pci.c
|
|
alpha_pci_iack_write(void) ""
|
|
|
|
# audio/alsaaudio.c
|
|
alsa_revents(int revents) "revents = %d"
|
|
alsa_pollout(int i, int fd) "i = %d fd = %d"
|
|
alsa_set_handler(int events, int index, int fd, int err) "events=%#x index=%d fd=%d err=%d"
|
|
alsa_wrote_zero(int len) "Failed to write %d frames (wrote zero)"
|
|
alsa_read_zero(long len) "Failed to read %ld frames (read zero)"
|
|
alsa_xrun_out(void) "Recovering from playback xrun"
|
|
alsa_xrun_in(void) "Recovering from capture xrun"
|
|
alsa_resume_out(void) "Resuming suspended output stream"
|
|
alsa_resume_in(void) "Resuming suspended input stream"
|
|
alsa_no_frames(int state) "No frames available and ALSA state is %d"
|
|
|
|
# audio/ossaudio.c
|
|
oss_version(int version) "OSS version = %#x"
|
|
oss_invalid_available_size(int size, int bufsize) "Invalid available size, size=%d bufsize=%d"
|
|
|
|
# net/vhost-user.c
|
|
vhost_user_event(const char *chr, int event) "chr: %s got event: %d"
|
|
|
|
# linux-user/signal.c
|
|
user_setup_frame(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
|
|
user_setup_rt_frame(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
|
|
user_do_rt_sigreturn(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
|
|
user_do_sigreturn(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64
|
|
user_force_sig(void *env, int target_sig, int host_sig) "env=%p signal %d (host %d)"
|
|
user_handle_signal(void *env, int target_sig) "env=%p signal %d"
|
|
user_host_signal(void *env, int host_sig, int target_sig) "env=%p signal %d (target %d("
|
|
user_queue_signal(void *env, int target_sig) "env=%p signal %d"
|
|
user_s390x_restore_sigregs(void *env, uint64_t sc_psw_addr, uint64_t env_psw_addr) "env=%p frame psw.addr %"PRIx64 " current psw.addr %"PRIx64
|
|
|
|
# hw/timer/aspeed_timer.c
|
|
aspeed_timer_ctrl_enable(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
|
|
aspeed_timer_ctrl_external_clock(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
|
|
aspeed_timer_ctrl_overflow_interrupt(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
|
|
aspeed_timer_ctrl_pulse_enable(uint8_t i, bool enable) "Timer %" PRIu8 ": %d"
|
|
aspeed_timer_set_ctrl2(uint32_t value) "Value: 0x%" PRIx32
|
|
aspeed_timer_set_value(int timer, int reg, uint32_t value) "Timer %d register %d: 0x%" PRIx32
|
|
aspeed_timer_read(uint64_t offset, unsigned size, uint64_t value) "From 0x%" PRIx64 ": of size %u: 0x%" PRIx64
|
|
|
|
### Guest events, keep at bottom
|
|
|
|
# @vaddr: Access' virtual address.
|
|
# @info : Access' information (see below).
|
|
#
|
|
# Start virtual memory access (before any potential access violation).
|
|
#
|
|
# Does not include memory accesses performed by devices.
|
|
#
|
|
# Access information can be parsed as:
|
|
#
|
|
# struct mem_info {
|
|
# uint8_t size_shift : 2; /* interpreted as "1 << size_shift" bytes */
|
|
# bool sign_extend: 1; /* sign-extended */
|
|
# uint8_t endianness : 1; /* 0: little, 1: big */
|
|
# bool store : 1; /* wheter it's a store operation */
|
|
# };
|
|
#
|
|
# Targets: TCG(all)
|
|
disable vcpu tcg guest_mem_before(TCGv vaddr, uint8_t info) "info=%d", "vaddr=0x%016"PRIx64" info=%d"
|