Peter Maydell bb4aa8f59e target-arm queue: ... * allwinner-h3: Switch to SMC as PSCI conduit * arm: tcg: Adhere to SMCCC 1.3 section 5.2 * xlnx-zcu102, xlnx-versal-virt: Support BBRAM and eFUSE devices * gdbstub related code cleanups * Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML * Use _init vs _new convention in bus creation function names * sabrelite: Connect SPI flash CS line to GPIO3_19 -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmFV05gZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3kVoD/9rlpi81v6U2zPmW5s/lFB8 m7eqtVpP2T1UwwGPw5jXZ4qAyDyCDXJxtW8B2ePxjXfrFT5f59hy9myBFqDebjNC Xwdwafc17lkUm0CrIEwhMhGYiXs6yak1YcGqEPZ3ceWt67kVByXGj89mLepogCHn LvcjQGC3PuDvDHWnOKdOBhxTu+rvQSDRXpVCuBAd3eJBn9jxG10cdaCr3/Z7VFA/ bnc9bSU8qJ0hYCswHHld9R2Rk9zYDQmrtMpygN6pviCd5qWGEOh8b5vszmrSHYo9 tn0bSp9d9k2wBXrPR5Ux3L0IMRBp7N88tSDw2QyatDltltjsCKw+ZMxjKHh0mxnr N1QF1FteIFliu5GQeMiEWPP87rVZ31quWZUIln6XYo9+aXus8jd88vxdpND1v767 np/q6BW0g+Tuu2T+QRe5V8VBQJzgEAKT7AwCVHC+5Flyq8fWFcFdPp1dygWXdzW3 Yhmq2JwwMq/3MjZY10aymohrvFPAQSx2bGGDS9yi8m5seaJvHjJW5fZQUVapy0vw andiIFNC9KxeQ23AZM0oKkW/d5EckKIkagfiq5+71QhvtbJrXbz+fs7UxHN0IVeX 7px+ih0xJcz3uVxZtZ/kvpBMMe3WEMd9r2tZOhbJ9K8RlCcB11y1AnZaBs/2fess +DzTJOkZGu1oDP4IAAqGBg== =eAN3 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210930' into staging target-arm queue: * allwinner-h3: Switch to SMC as PSCI conduit * arm: tcg: Adhere to SMCCC 1.3 section 5.2 * xlnx-zcu102, xlnx-versal-virt: Support BBRAM and eFUSE devices * gdbstub related code cleanups * Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML * Use _init vs _new convention in bus creation function names * sabrelite: Connect SPI flash CS line to GPIO3_19 # gpg: Signature made Thu 30 Sep 2021 16:11:20 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210930: (22 commits) hw/arm: sabrelite: Connect SPI flash CS line to GPIO3_19 ide: Rename ide_bus_new() to ide_bus_init() qbus: Rename qbus_create() to qbus_new() qbus: Rename qbus_create_inplace() to qbus_init() pci: Rename pci_root_bus_new_inplace() to pci_root_bus_init() ipack: Rename ipack_bus_new_inplace() to ipack_bus_init() scsi: Replace scsi_bus_new() with scsi_bus_init(), scsi_bus_init_named() target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML target/arm: Move gdbstub related code out of helper.c target/arm: Fix coding style issues in gdbstub code in helper.c configs: Don't include 32-bit-only GDB XML in aarch64 linux configs docs/system/arm: xlnx-versal-virt: BBRAM and eFUSE Usage hw/arm: xlnx-zcu102: Add Xilinx eFUSE device hw/arm: xlnx-zcu102: Add Xilinx BBRAM device hw/arm: xlnx-versal-virt: Add Xilinx eFUSE device hw/arm: xlnx-versal-virt: Add Xilinx BBRAM device hw/nvram: Introduce Xilinx battery-backed ram hw/nvram: Introduce Xilinx ZynqMP eFuse device hw/nvram: Introduce Xilinx Versal eFuse device hw/nvram: Introduce Xilinx eFuse QOM ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2021-09-30 21:16:54 +01:00
..
authz	Prefer 'on' | 'off' over 'yes' | 'no' for bool options	2021-01-29 17:07:53 +00:00
block	block: use int64_t instead of int in driver discard handlers	2021-09-29 13:46:32 -05:00
chardev	chardev: add some comments about the class methods	2021-09-14 16:57:11 +04:00
crypto	crypto: Make QCryptoTLSCreds* structures private	2021-06-29 18:30:24 +01:00
disas	Drop the deprecated lm32 target	2021-05-12 18:20:25 +02:00
exec	memory: Name all the memory listeners	2021-09-30 15:30:24 +02:00
fpu	Remove leading underscores from QEMU defines	2021-06-21 05:49:01 +02:00
hw	target-arm queue:	2021-09-30 21:16:54 +01:00
io	io: add qio_channel_readv_full_all_eof & qio_channel_readv_full_all helpers	2021-02-10 09:23:28 +00:00
libdecnumber	include: Make headers more self-contained	2019-08-16 13:31:51 +02:00
migration	vfio: Support for RamDiscardManager in the vIOMMU case	2021-07-08 15:54:45 -04:00
monitor	target/i386: Add HMP and QMP interfaces for SGX	2021-09-30 15:30:24 +02:00
net	vhost_net: do not assume nvqs is always 2	2021-09-04 17:34:05 -04:00
qapi	qapi: introduce forwarding visitor	2021-07-23 18:17:17 +02:00
qemu	host-utils: introduce uabs64()	2021-09-29 19:37:38 +10:00
qom	qom: export more functions for use with non-UserCreatable objects	2021-07-06 08:33:51 +02:00
scsi	scsi: inline sg_io_sense_from_errno() into the callers.	2021-03-06 11:42:56 +01:00
semihosting	semihosting: Move include/hw/semihosting/ -> include/semihosting/	2021-03-10 15:34:12 +00:00
standard-headers	linux-headers: Update	2021-07-09 11:01:06 +10:00
sysemu	memory: Name all the memory listeners	2021-09-30 15:30:24 +02:00
tcg	tcg: Remove tcg_global_reg_new defines	2021-09-14 12:00:20 -07:00
ui	ui/gtk-egl: Wait for the draw signal for dmabuf blobs	2021-09-15 08:41:59 +02:00
user	Remove leading underscores from QEMU defines	2021-06-21 05:49:01 +02:00
elf.h	linux-user: elf: s390x: Prepare for Vector enhancements facility	2021-06-21 08:48:21 +02:00
glib-compat.h	configure: bump min required glib version to 2.56	2021-06-02 09:11:32 +02:00
qemu-common.h	qemu-common.h: Update copyright string to 2021	2021-03-09 22:19:24 +01:00
qemu-io.h	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
trace-tcg.h