mirror of
https://github.com/qemu/qemu.git
synced 2024-12-22 11:43:48 +08:00
64552b6be4
In my "build everything" tree, changing hw/irq.h triggers a recompile of some 5400 out of 6600 objects (not counting tests and objects that don't depend on qemu/osdep.h). hw/hw.h supposedly includes it for convenience. Several other headers include it just to get qemu_irq and.or qemu_irq_handler. Move the qemu_irq and qemu_irq_handler typedefs from hw/irq.h to qemu/typedefs.h, and then include hw/irq.h only where it's still needed. Touching it now recompiles only some 500 objects. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190812052359.30071-13-armbru@redhat.com>
82 lines
2.1 KiB
C
82 lines
2.1 KiB
C
#ifndef SH_INTC_H
|
|
#define SH_INTC_H
|
|
|
|
#include "exec/memory.h"
|
|
|
|
typedef unsigned char intc_enum;
|
|
|
|
struct intc_vect {
|
|
intc_enum enum_id;
|
|
unsigned short vect;
|
|
};
|
|
|
|
#define INTC_VECT(enum_id, vect) { enum_id, vect }
|
|
|
|
struct intc_group {
|
|
intc_enum enum_id;
|
|
intc_enum enum_ids[32];
|
|
};
|
|
|
|
#define INTC_GROUP(enum_id, ...) { enum_id, { __VA_ARGS__ } }
|
|
|
|
struct intc_mask_reg {
|
|
unsigned long set_reg, clr_reg, reg_width;
|
|
intc_enum enum_ids[32];
|
|
unsigned long value;
|
|
};
|
|
|
|
struct intc_prio_reg {
|
|
unsigned long set_reg, clr_reg, reg_width, field_width;
|
|
intc_enum enum_ids[16];
|
|
unsigned long value;
|
|
};
|
|
|
|
#define _INTC_ARRAY(a) a, ARRAY_SIZE(a)
|
|
|
|
struct intc_source {
|
|
unsigned short vect;
|
|
intc_enum next_enum_id;
|
|
|
|
int asserted; /* emulates the interrupt signal line from device to intc */
|
|
int enable_count;
|
|
int enable_max;
|
|
int pending; /* emulates the result of signal and masking */
|
|
struct intc_desc *parent;
|
|
};
|
|
|
|
struct intc_desc {
|
|
MemoryRegion iomem;
|
|
MemoryRegion *iomem_aliases;
|
|
qemu_irq *irqs;
|
|
struct intc_source *sources;
|
|
int nr_sources;
|
|
struct intc_mask_reg *mask_regs;
|
|
int nr_mask_regs;
|
|
struct intc_prio_reg *prio_regs;
|
|
int nr_prio_regs;
|
|
int pending; /* number of interrupt sources that has pending set */
|
|
};
|
|
|
|
int sh_intc_get_pending_vector(struct intc_desc *desc, int imask);
|
|
struct intc_source *sh_intc_source(struct intc_desc *desc, intc_enum id);
|
|
void sh_intc_toggle_source(struct intc_source *source,
|
|
int enable_adj, int assert_adj);
|
|
|
|
void sh_intc_register_sources(struct intc_desc *desc,
|
|
struct intc_vect *vectors,
|
|
int nr_vectors,
|
|
struct intc_group *groups,
|
|
int nr_groups);
|
|
|
|
int sh_intc_init(MemoryRegion *sysmem,
|
|
struct intc_desc *desc,
|
|
int nr_sources,
|
|
struct intc_mask_reg *mask_regs,
|
|
int nr_mask_regs,
|
|
struct intc_prio_reg *prio_regs,
|
|
int nr_prio_regs);
|
|
|
|
void sh_intc_set_irl(void *opaque, int n, int level);
|
|
|
|
#endif /* SH_INTC_H */
|