mirror of
https://github.com/qemu/qemu.git
synced 2024-11-26 12:23:36 +08:00
fcf5ef2ab5
We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part] Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part] Acked-by: Michael Walle <michael@walle.cc> [lm32 part] Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part] Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part] Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part] Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part] Acked-by: Richard Henderson <rth@twiddle.net> [alpha part] Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part] Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part] Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [crisµblaze part] Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part] Signed-off-by: Thomas Huth <thuth@redhat.com>
46 lines
1.5 KiB
Plaintext
46 lines
1.5 KiB
Plaintext
LatticeMico32 target
|
|
--------------------
|
|
|
|
General
|
|
-------
|
|
All opcodes including the JUART CSRs are supported.
|
|
|
|
|
|
JTAG UART
|
|
---------
|
|
JTAG UART is routed to a serial console device. For the current boards it
|
|
is the second one. Ie to enable it in the qemu virtual console window use
|
|
the following command line parameters:
|
|
-serial vc -serial vc
|
|
This will make serial0 (the lm32_uart) and serial1 (the JTAG UART)
|
|
available as virtual consoles.
|
|
|
|
|
|
Semihosting
|
|
-----------
|
|
Semihosting on this target is supported. Some system calls like read, write
|
|
and exit are executed on the host if semihosting is enabled. See
|
|
target/lm32-semi.c for all supported system calls. Emulation aware programs
|
|
can use this mechanism to shut down the virtual machine and print to the
|
|
host console. See the tcg tests for an example.
|
|
|
|
|
|
Special instructions
|
|
--------------------
|
|
The translation recognizes one special instruction to halt the cpu:
|
|
and r0, r0, r0
|
|
On real hardware this instruction is a nop. It is not used by GCC and
|
|
should (hopefully) not be used within hand-crafted assembly.
|
|
Insert this instruction in your idle loop to reduce the cpu load on the
|
|
host.
|
|
|
|
|
|
Ignoring the MSB of the address bus
|
|
-----------------------------------
|
|
Some SoC ignores the MSB on the address bus. Thus creating a shadow memory
|
|
area. As a general rule, 0x00000000-0x7fffffff is cached, whereas
|
|
0x80000000-0xffffffff is not cached and used to access IO devices. This
|
|
behaviour can be enabled with:
|
|
cpu_lm32_set_phys_msb_ignore(env, 1);
|
|
|