.. |
alpha
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tcg: Search includes from the project root source directory
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2020-01-15 15:13:10 -10:00 |
arm
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target/arm: Flush high bits of sve register after AdvSIMD EXT
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2020-02-21 16:07:00 +00:00 |
cris
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cpu: Use cpu_class_set_parent_reset()
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2020-01-24 20:59:06 +01:00 |
hppa
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target/hppa: Allow, but diagnose, LDCW aligned only mod 4
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2020-01-27 10:49:51 -08:00 |
i386
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target/i386/whpx: Remove superfluous semicolon
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2020-02-18 20:20:49 +01:00 |
lm32
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cpu: Use cpu_class_set_parent_reset()
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2020-01-24 20:59:06 +01:00 |
m68k
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cpu: Use cpu_class_set_parent_reset()
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2020-01-24 20:59:06 +01:00 |
microblaze
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qdev: set properties with device_class_set_props()
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2020-01-24 20:59:15 +01:00 |
mips
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target/mips: Separate FPU-related helpers into their own file
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2020-02-04 08:53:54 +01:00 |
moxie
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cpu: Use cpu_class_set_parent_reset()
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2020-01-24 20:59:06 +01:00 |
nios2
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qdev: set properties with device_class_set_props()
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2020-01-24 20:59:15 +01:00 |
openrisc
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cpu: Use cpu_class_set_parent_reset()
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2020-01-24 20:59:06 +01:00 |
ppc
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target/ppc/cpu.h: Clean up comments in the struct CPUPPCState definition
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2020-02-21 09:15:04 +11:00 |
riscv
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riscv: Separate FPU register size from core register size in gdbstub [v2]
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2020-02-10 12:01:36 -08:00 |
s390x
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s390x: sigp: Fix sense running reporting
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2020-01-27 12:13:10 +01:00 |
sh4
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cpu: Use cpu_class_set_parent_reset()
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2020-01-24 20:59:06 +01:00 |
sparc
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qdev: set properties with device_class_set_props()
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2020-01-24 20:59:15 +01:00 |
tilegx
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cpu: Use cpu_class_set_parent_reset()
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2020-01-24 20:59:06 +01:00 |
tricore
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cpu: Use cpu_class_set_parent_reset()
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2020-01-24 20:59:06 +01:00 |
unicore32
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tcg: Search includes from the project root source directory
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2020-01-15 15:13:10 -10:00 |
xtensa
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cpu: Use cpu_class_set_parent_reset()
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2020-01-24 20:59:06 +01:00 |