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This obsoletes ppc-for-2.9-20170112, which had a MacOS build bug. This is a long overdue ppc pull request for qemu-2.9. It's been a long time coming due to some holidays and inconveniently timed problems with testing. So, there's a lot in here: * More POWER9 instruction implementations for TCG * The simpler parts of my CPU compatibility mode cleanup * This changes behaviour to prefer compatibility modes over "raW" mode for new machine type versions * New "40p" machine type which is essentially a modernized and cleaned up "prep". The intention is that it will replace "prep" once it has some more testing and polish. * Add pseries-2.9 machine type * Implement H_SIGNAL_SYS_RESET hypercall * Consolidate the two alternate CPU init paths in pseries by making it always go through CPU core objects to initialize CPU * A number of bugfixes and cleanups * Stop the guest timebase when the guest is stopped under KVM. This makes the guest system clock also stop when paused, which matches the x86 behaviour. * Some preliminary cleanups leading towards implementation of the POWER9 MMU. There are also some changes not strictly related to ppc code, but for its benefit: * Limit the pxi-expander-bridge (PXB) device to x86 guests only (it's essentially a hack to work around historical x86 limitations) * Some additions to the 128-bit math in host_utils, necessary for some of the new instructions. * Revise a number of qtests and enable them for ppc -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJYko4AAAoJEGw4ysog2bOStEYQAIk0Pd6ifZzJUcTWQaR8+AZ7 nTbzQyWtSHqSAiwBNsykJMFXV1liZVglf2e+VBsrVOwKoU50VOyVm5LspG2z1h8N Rxe4FGA2MA//2F3+9/AP8Oe3RdsClNCDaXAVuCFRP4xQWxqqwwasChDeS4Ph/cZq CXnlhKTpk9v5vSCsr64bUOSYh3RPumnQepiBgT82hOo7R+VaJ79AFbTeCYKkd0hY Sq8g3mg0zOX1ekNXPk1h8oZWqkoZGbqKiXgoy/evGXWURVzTSJO6VTyM65tdwWB7 Zds77gYAYCIYKq+Iwv4iBCmo4KJofjKQcQepQUr+eGDv9syXebtp6fY0btnIS+DX uGzzaixZNms9r2+FAiIlKwIeQgQvl76lYEGmvBrbrgSOyA/7GAkOId0E0Ul6D5LW EJSwk9ZDbyE0JBEq6Bx+LClpwye+bpdScU26djQTTcWpFApIeJTyG9V6b1xwulVZ rw68ZvfMYxktkvhTbEtvk2O9YZI5eQStBJkmJXeOiOduiP93aiC82MM1Jp+82Q1E 4qRVvCpGTwzF3GLFciUKAqmwfYxByo4G0/dwG8qw6WNEemLyXFHV5TkzLhgwl3kC gDGl5AdH4MXj8NRjuHcDiGXfePBCD578dmz4xo5ZLA2yBavxkRzM8QsEUmD8hf5w jhLgyKt0G2hNNtOnGOdG =vLVl -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.9-20170202' into staging ppc patch queue 2017-02-02 This obsoletes ppc-for-2.9-20170112, which had a MacOS build bug. This is a long overdue ppc pull request for qemu-2.9. It's been a long time coming due to some holidays and inconveniently timed problems with testing. So, there's a lot in here: * More POWER9 instruction implementations for TCG * The simpler parts of my CPU compatibility mode cleanup * This changes behaviour to prefer compatibility modes over "raW" mode for new machine type versions * New "40p" machine type which is essentially a modernized and cleaned up "prep". The intention is that it will replace "prep" once it has some more testing and polish. * Add pseries-2.9 machine type * Implement H_SIGNAL_SYS_RESET hypercall * Consolidate the two alternate CPU init paths in pseries by making it always go through CPU core objects to initialize CPU * A number of bugfixes and cleanups * Stop the guest timebase when the guest is stopped under KVM. This makes the guest system clock also stop when paused, which matches the x86 behaviour. * Some preliminary cleanups leading towards implementation of the POWER9 MMU. There are also some changes not strictly related to ppc code, but for its benefit: * Limit the pxi-expander-bridge (PXB) device to x86 guests only (it's essentially a hack to work around historical x86 limitations) * Some additions to the 128-bit math in host_utils, necessary for some of the new instructions. * Revise a number of qtests and enable them for ppc # gpg: Signature made Thu 02 Feb 2017 01:40:16 GMT # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-2.9-20170202: (107 commits) hw/ppc/pnv: Use error_report instead of hw_error if a ROM file can't be found ppc/kvm: Handle the "family" CPU via alias instead of registering new types target/ppc/mmu_hash64: Fix incorrect shift value in amr calculation target/ppc/mmu_hash64: Fix printing unsigned as signed int tcg/POWER9: NOOP the cp_abort instruction target/ppc/debug: Print LPCR register value if register exists target-ppc: Add xststdc[sp, dp, qp] instructions target-ppc: Add xvtstdc[sp,dp] instructions target-ppc: Add MMU model check for booke machines ppc: switch to constants within BUILD_BUG_ON target/ppc/cpu-models: Fix/remove bad CPU aliases target/ppc: Remove unused POWERPC_FAMILY(POWER) spapr: clock should count only if vm is running ppc: Remove unused function cpu_ppc601_rtc_init() target/ppc: Add pcr_supported to POWER9 cpu class definition powerpc/cpu-models: rename ISAv3.00 logical PVR definition target-ppc: Add xvcv[hpsp, sphp] instructions target-ppc: Add xsmulqp instruction target-ppc: Add xsdivqp instruction target-ppc: Add xscvsdqp and xscvudqp instructions ... # Conflicts: # hw/pci-bridge/Makefile.objs Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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.. | ||
dec.c | ||
dec.h | ||
gen_pcie_root_port.c | ||
i82801b11.c | ||
ioh3420.c | ||
ioh3420.h | ||
Makefile.objs | ||
pci_bridge_dev.c | ||
pci_expander_bridge.c | ||
pcie_root_port.c | ||
xio3130_downstream.c | ||
xio3130_downstream.h | ||
xio3130_upstream.c | ||
xio3130_upstream.h |