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GDB's remote protocol requires M-profile cores to use the feature name 'org.gnu.gdb.arm.m-profile' instead of the 'org.gnu.gdb.arm.core' feature used for A- and R-profile cores. We weren't doing this, which meant GDB treated our M-profile cores like A-profile ones. This mostly doesn't matter, but for instance means that it doesn't correctly handle backtraces where an M-profile exception frame is involved. Ship a copy of GDB's arm-m-profile.xml and use it on the M-profile cores. The integer registers have the same offsets as the arm-core.xml, but register 25 is the M-profile XPSR rather than the A-profile CPSR, so we need to update arm_cpu_gdb_read_register() and arm_cpu_gdb_write_register() to handle XSPR reads and writes. Fixes: https://bugs.launchpad.net/qemu/+bug/1877136 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200507134755.13997-1-peter.maydell@linaro.org |
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aarch64-core.xml | ||
aarch64-fpu.xml | ||
arm-core.xml | ||
arm-m-profile.xml | ||
arm-neon.xml | ||
arm-vfp3.xml | ||
arm-vfp.xml | ||
cf-core.xml | ||
cf-fp.xml | ||
i386-32bit.xml | ||
i386-64bit.xml | ||
m68k-core.xml | ||
m68k-fp.xml | ||
power64-core.xml | ||
power-altivec.xml | ||
power-core.xml | ||
power-fpu.xml | ||
power-spe.xml | ||
power-vsx.xml | ||
riscv-32bit-cpu.xml | ||
riscv-32bit-csr.xml | ||
riscv-32bit-fpu.xml | ||
riscv-32bit-virtual.xml | ||
riscv-64bit-cpu.xml | ||
riscv-64bit-csr.xml | ||
riscv-64bit-fpu.xml | ||
riscv-64bit-virtual.xml | ||
rx-core.xml | ||
s390-acr.xml | ||
s390-cr.xml | ||
s390-fpr.xml | ||
s390-gs.xml | ||
s390-virt.xml | ||
s390-vx.xml | ||
s390x-core64.xml |