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fcf5ef2ab5
We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part] Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part] Acked-by: Michael Walle <michael@walle.cc> [lm32 part] Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part] Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part] Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part] Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part] Acked-by: Richard Henderson <rth@twiddle.net> [alpha part] Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part] Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part] Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [crisµblaze part] Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part] Signed-off-by: Thomas Huth <thuth@redhat.com>
177 lines
4.8 KiB
C
177 lines
4.8 KiB
C
/*
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* PowerPC emulation helpers for QEMU.
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*
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* Copyright (c) 2003-2007 Jocelyn Mayer
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/helper-proto.h"
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#include "exec/exec-all.h"
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#include "qemu/log.h"
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/*****************************************************************************/
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/* SPR accesses */
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target_ulong helper_load_tbl(CPUPPCState *env)
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{
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return (target_ulong)cpu_ppc_load_tbl(env);
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}
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target_ulong helper_load_tbu(CPUPPCState *env)
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{
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return cpu_ppc_load_tbu(env);
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}
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target_ulong helper_load_atbl(CPUPPCState *env)
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{
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return (target_ulong)cpu_ppc_load_atbl(env);
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}
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target_ulong helper_load_atbu(CPUPPCState *env)
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{
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return cpu_ppc_load_atbu(env);
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}
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#if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)
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target_ulong helper_load_purr(CPUPPCState *env)
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{
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return (target_ulong)cpu_ppc_load_purr(env);
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}
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#endif
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target_ulong helper_load_601_rtcl(CPUPPCState *env)
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{
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return cpu_ppc601_load_rtcl(env);
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}
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target_ulong helper_load_601_rtcu(CPUPPCState *env)
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{
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return cpu_ppc601_load_rtcu(env);
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}
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#if !defined(CONFIG_USER_ONLY)
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void helper_store_tbl(CPUPPCState *env, target_ulong val)
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{
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cpu_ppc_store_tbl(env, val);
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}
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void helper_store_tbu(CPUPPCState *env, target_ulong val)
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{
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cpu_ppc_store_tbu(env, val);
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}
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void helper_store_atbl(CPUPPCState *env, target_ulong val)
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{
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cpu_ppc_store_atbl(env, val);
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}
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void helper_store_atbu(CPUPPCState *env, target_ulong val)
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{
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cpu_ppc_store_atbu(env, val);
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}
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void helper_store_601_rtcl(CPUPPCState *env, target_ulong val)
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{
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cpu_ppc601_store_rtcl(env, val);
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}
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void helper_store_601_rtcu(CPUPPCState *env, target_ulong val)
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{
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cpu_ppc601_store_rtcu(env, val);
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}
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target_ulong helper_load_decr(CPUPPCState *env)
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{
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return cpu_ppc_load_decr(env);
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}
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void helper_store_decr(CPUPPCState *env, target_ulong val)
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{
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cpu_ppc_store_decr(env, val);
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}
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target_ulong helper_load_hdecr(CPUPPCState *env)
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{
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return cpu_ppc_load_hdecr(env);
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}
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void helper_store_hdecr(CPUPPCState *env, target_ulong val)
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{
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cpu_ppc_store_hdecr(env, val);
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}
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target_ulong helper_load_40x_pit(CPUPPCState *env)
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{
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return load_40x_pit(env);
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}
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void helper_store_40x_pit(CPUPPCState *env, target_ulong val)
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{
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store_40x_pit(env, val);
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}
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void helper_store_booke_tcr(CPUPPCState *env, target_ulong val)
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{
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store_booke_tcr(env, val);
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}
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void helper_store_booke_tsr(CPUPPCState *env, target_ulong val)
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{
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store_booke_tsr(env, val);
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}
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#endif
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/*****************************************************************************/
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/* Embedded PowerPC specific helpers */
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/* XXX: to be improved to check access rights when in user-mode */
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target_ulong helper_load_dcr(CPUPPCState *env, target_ulong dcrn)
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{
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uint32_t val = 0;
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if (unlikely(env->dcr_env == NULL)) {
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qemu_log_mask(LOG_GUEST_ERROR, "No DCR environment\n");
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raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
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POWERPC_EXCP_INVAL |
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POWERPC_EXCP_INVAL_INVAL, GETPC());
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} else if (unlikely(ppc_dcr_read(env->dcr_env,
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(uint32_t)dcrn, &val) != 0)) {
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qemu_log_mask(LOG_GUEST_ERROR, "DCR read error %d %03x\n",
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(uint32_t)dcrn, (uint32_t)dcrn);
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raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
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POWERPC_EXCP_INVAL |
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POWERPC_EXCP_PRIV_REG, GETPC());
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}
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return val;
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}
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void helper_store_dcr(CPUPPCState *env, target_ulong dcrn, target_ulong val)
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{
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if (unlikely(env->dcr_env == NULL)) {
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qemu_log_mask(LOG_GUEST_ERROR, "No DCR environment\n");
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raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
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POWERPC_EXCP_INVAL |
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POWERPC_EXCP_INVAL_INVAL, GETPC());
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} else if (unlikely(ppc_dcr_write(env->dcr_env, (uint32_t)dcrn,
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(uint32_t)val) != 0)) {
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qemu_log_mask(LOG_GUEST_ERROR, "DCR write error %d %03x\n",
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(uint32_t)dcrn, (uint32_t)dcrn);
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raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
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POWERPC_EXCP_INVAL |
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POWERPC_EXCP_PRIV_REG, GETPC());
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}
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}
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