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2ee77040f5
e6f7e110ee "ppc/xics: remove the XICSState classes" got rid of
XICSState, this is just an leftover.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
66 lines
1.7 KiB
C
66 lines
1.7 KiB
C
/*
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* QEMU PowerPC PowerNV Processor Service Interface (PSI) model
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*
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* Copyright (c) 2015-2017, IBM Corporation.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _PPC_PNV_PSI_H
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#define _PPC_PNV_PSI_H
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#include "hw/sysbus.h"
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#include "hw/ppc/xics.h"
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#define TYPE_PNV_PSI "pnv-psi"
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#define PNV_PSI(obj) \
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OBJECT_CHECK(PnvPsi, (obj), TYPE_PNV_PSI)
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#define PSIHB_XSCOM_MAX 0x20
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typedef struct PnvPsi {
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SysBusDevice parent;
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MemoryRegion regs_mr;
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uint64_t bar;
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/* FSP region not supported */
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/* MemoryRegion fsp_mr; */
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uint64_t fsp_bar;
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/* Interrupt generation */
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ICSState ics;
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/* Registers */
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uint64_t regs[PSIHB_XSCOM_MAX];
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MemoryRegion xscom_regs;
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} PnvPsi;
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/* The PSI and FSP interrupts are muxed on the same IRQ number */
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typedef enum PnvPsiIrq {
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PSIHB_IRQ_PSI, /* internal use only */
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PSIHB_IRQ_FSP, /* internal use only */
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PSIHB_IRQ_OCC,
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PSIHB_IRQ_FSI,
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PSIHB_IRQ_LPC_I2C,
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PSIHB_IRQ_LOCAL_ERR,
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PSIHB_IRQ_EXTERNAL,
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} PnvPsiIrq;
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#define PSI_NUM_INTERRUPTS 6
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extern void pnv_psi_irq_set(PnvPsi *psi, PnvPsiIrq irq, bool state);
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#endif /* _PPC_PNV_PSI_H */
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