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683685e72d
NVMe fixes to solve IOMMU issues on non-x86 and error message/tracing improvements. Elena Afanasova's ioeventfd fixes are also included. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> -----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEhpWov9P5fNqsNXdanKSrs4Grc8gFAl+ixjgACgkQnKSrs4Gr c8iZYgf+OB2eAGsdZO97fKh6VUUoRKa+BgWKuh37Cfpp3q+dLuIFMSKfU/UgprLc aowt6uTFfwudDV9KltUB2EiXIzpuf7JhMNOiDRkyEvYSj4KHRPsQmFCd35Nrjezy VvxSGafe2Z60Qnvcx+iGeMATSFX9YTcTZeHttC07v7dWn/yEK3b1hobcmjCcwWeR Ud8pjMyh5E2z/NpW8E669/byJf9iahx3LSQxSWt+9PVTPuftAB0Suu+m6svz1wvk sjVfIbtVWCp2BdGf5U6a2rEqF3+kIcFkfHp+MwgE0EdMz1wfjudaPl13a0C4DSun PSt9E+Ct5BTrDUvqCHvQDOaFiMZTPg== =Poyb -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-request' into staging Pull request for 5.2 NVMe fixes to solve IOMMU issues on non-x86 and error message/tracing improvements. Elena Afanasova's ioeventfd fixes are also included. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> # gpg: Signature made Wed 04 Nov 2020 15:18:16 GMT # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [full] # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" [full] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha-gitlab/tags/block-pull-request: (33 commits) util/vfio-helpers: Assert offset is aligned to page size util/vfio-helpers: Convert vfio_dump_mapping to trace events util/vfio-helpers: Improve DMA trace events util/vfio-helpers: Trace where BARs are mapped util/vfio-helpers: Trace PCI BAR region info util/vfio-helpers: Trace PCI I/O config accesses util/vfio-helpers: Improve reporting unsupported IOMMU type block/nvme: Fix nvme_submit_command() on big-endian host block/nvme: Fix use of write-only doorbells page on Aarch64 arch block/nvme: Align iov's va and size on host page size block/nvme: Change size and alignment of prp_list_pages block/nvme: Change size and alignment of queue block/nvme: Change size and alignment of IDENTIFY response buffer block/nvme: Correct minimum device page size block/nvme: Set request_alignment at initialization block/nvme: Simplify nvme_cmd_sync() block/nvme: Simplify ADMIN queue access block/nvme: Correctly initialize Admin Queue Attributes block/nvme: Use definitions instead of magic values in add_io_queue() block/nvme: Introduce Completion Queue definitions ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
864 lines
26 KiB
C
864 lines
26 KiB
C
/*
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* VFIO utility
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*
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* Copyright 2016 - 2018 Red Hat, Inc.
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*
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* Authors:
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* Fam Zheng <famz@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include <sys/ioctl.h>
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#include <linux/vfio.h>
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#include "qapi/error.h"
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#include "exec/ramlist.h"
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#include "exec/cpu-common.h"
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#include "exec/memory.h"
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#include "trace.h"
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#include "qemu/error-report.h"
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#include "standard-headers/linux/pci_regs.h"
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#include "qemu/event_notifier.h"
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#include "qemu/vfio-helpers.h"
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#include "qemu/lockable.h"
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#include "trace.h"
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#define QEMU_VFIO_DEBUG 0
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#define QEMU_VFIO_IOVA_MIN 0x10000ULL
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/* XXX: Once VFIO exposes the iova bit width in the IOMMU capability interface,
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* we can use a runtime limit; alternatively it's also possible to do platform
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* specific detection by reading sysfs entries. Until then, 39 is a safe bet.
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**/
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#define QEMU_VFIO_IOVA_MAX (1ULL << 39)
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typedef struct {
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/* Page aligned addr. */
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void *host;
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size_t size;
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uint64_t iova;
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} IOVAMapping;
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struct IOVARange {
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uint64_t start;
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uint64_t end;
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};
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struct QEMUVFIOState {
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QemuMutex lock;
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/* These fields are protected by BQL */
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int container;
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int group;
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int device;
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RAMBlockNotifier ram_notifier;
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struct vfio_region_info config_region_info, bar_region_info[6];
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struct IOVARange *usable_iova_ranges;
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uint8_t nb_iova_ranges;
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/* These fields are protected by @lock */
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/* VFIO's IO virtual address space is managed by splitting into a few
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* sections:
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*
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* --------------- <= 0
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* |xxxxxxxxxxxxx|
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* |-------------| <= QEMU_VFIO_IOVA_MIN
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* | |
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* | Fixed |
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* | |
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* |-------------| <= low_water_mark
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* | |
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* | Free |
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* | |
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* |-------------| <= high_water_mark
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* | |
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* | Temp |
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* | |
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* |-------------| <= QEMU_VFIO_IOVA_MAX
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* |xxxxxxxxxxxxx|
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* |xxxxxxxxxxxxx|
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* ---------------
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*
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* - Addresses lower than QEMU_VFIO_IOVA_MIN are reserved as invalid;
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*
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* - Fixed mappings of HVAs are assigned "low" IOVAs in the range of
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* [QEMU_VFIO_IOVA_MIN, low_water_mark). Once allocated they will not be
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* reclaimed - low_water_mark never shrinks;
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*
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* - IOVAs in range [low_water_mark, high_water_mark) are free;
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*
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* - IOVAs in range [high_water_mark, QEMU_VFIO_IOVA_MAX) are volatile
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* mappings. At each qemu_vfio_dma_reset_temporary() call, the whole area
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* is recycled. The caller should make sure I/O's depending on these
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* mappings are completed before calling.
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**/
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uint64_t low_water_mark;
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uint64_t high_water_mark;
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IOVAMapping *mappings;
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int nr_mappings;
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};
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/**
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* Find group file by PCI device address as specified @device, and return the
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* path. The returned string is owned by caller and should be g_free'ed later.
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*/
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static char *sysfs_find_group_file(const char *device, Error **errp)
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{
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char *sysfs_link;
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char *sysfs_group;
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char *p;
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char *path = NULL;
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sysfs_link = g_strdup_printf("/sys/bus/pci/devices/%s/iommu_group", device);
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sysfs_group = g_malloc0(PATH_MAX);
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if (readlink(sysfs_link, sysfs_group, PATH_MAX - 1) == -1) {
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error_setg_errno(errp, errno, "Failed to find iommu group sysfs path");
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goto out;
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}
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p = strrchr(sysfs_group, '/');
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if (!p) {
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error_setg(errp, "Failed to find iommu group number");
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goto out;
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}
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path = g_strdup_printf("/dev/vfio/%s", p + 1);
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out:
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g_free(sysfs_link);
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g_free(sysfs_group);
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return path;
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}
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static inline void assert_bar_index_valid(QEMUVFIOState *s, int index)
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{
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assert(index >= 0 && index < ARRAY_SIZE(s->bar_region_info));
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}
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static int qemu_vfio_pci_init_bar(QEMUVFIOState *s, int index, Error **errp)
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{
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g_autofree char *barname = NULL;
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assert_bar_index_valid(s, index);
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s->bar_region_info[index] = (struct vfio_region_info) {
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.index = VFIO_PCI_BAR0_REGION_INDEX + index,
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.argsz = sizeof(struct vfio_region_info),
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};
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if (ioctl(s->device, VFIO_DEVICE_GET_REGION_INFO, &s->bar_region_info[index])) {
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error_setg_errno(errp, errno, "Failed to get BAR region info");
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return -errno;
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}
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barname = g_strdup_printf("bar[%d]", index);
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trace_qemu_vfio_region_info(barname, s->bar_region_info[index].offset,
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s->bar_region_info[index].size,
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s->bar_region_info[index].cap_offset);
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return 0;
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}
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/**
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* Map a PCI bar area.
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*/
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void *qemu_vfio_pci_map_bar(QEMUVFIOState *s, int index,
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uint64_t offset, uint64_t size, int prot,
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Error **errp)
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{
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void *p;
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assert(QEMU_IS_ALIGNED(offset, qemu_real_host_page_size));
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assert_bar_index_valid(s, index);
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p = mmap(NULL, MIN(size, s->bar_region_info[index].size - offset),
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prot, MAP_SHARED,
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s->device, s->bar_region_info[index].offset + offset);
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trace_qemu_vfio_pci_map_bar(index, s->bar_region_info[index].offset ,
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size, offset, p);
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if (p == MAP_FAILED) {
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error_setg_errno(errp, errno, "Failed to map BAR region");
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p = NULL;
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}
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return p;
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}
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/**
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* Unmap a PCI bar area.
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*/
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void qemu_vfio_pci_unmap_bar(QEMUVFIOState *s, int index, void *bar,
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uint64_t offset, uint64_t size)
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{
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if (bar) {
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munmap(bar, MIN(size, s->bar_region_info[index].size - offset));
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}
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}
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/**
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* Initialize device IRQ with @irq_type and register an event notifier.
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*/
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int qemu_vfio_pci_init_irq(QEMUVFIOState *s, EventNotifier *e,
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int irq_type, Error **errp)
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{
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int r;
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struct vfio_irq_set *irq_set;
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size_t irq_set_size;
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struct vfio_irq_info irq_info = { .argsz = sizeof(irq_info) };
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irq_info.index = irq_type;
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if (ioctl(s->device, VFIO_DEVICE_GET_IRQ_INFO, &irq_info)) {
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error_setg_errno(errp, errno, "Failed to get device interrupt info");
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return -errno;
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}
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if (!(irq_info.flags & VFIO_IRQ_INFO_EVENTFD)) {
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error_setg(errp, "Device interrupt doesn't support eventfd");
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return -EINVAL;
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}
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irq_set_size = sizeof(*irq_set) + sizeof(int);
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irq_set = g_malloc0(irq_set_size);
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/* Get to a known IRQ state */
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*irq_set = (struct vfio_irq_set) {
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.argsz = irq_set_size,
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.flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER,
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.index = irq_info.index,
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.start = 0,
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.count = 1,
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};
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*(int *)&irq_set->data = event_notifier_get_fd(e);
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r = ioctl(s->device, VFIO_DEVICE_SET_IRQS, irq_set);
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g_free(irq_set);
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if (r) {
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error_setg_errno(errp, errno, "Failed to setup device interrupt");
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return -errno;
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}
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return 0;
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}
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static int qemu_vfio_pci_read_config(QEMUVFIOState *s, void *buf,
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int size, int ofs)
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{
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int ret;
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trace_qemu_vfio_pci_read_config(buf, ofs, size,
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s->config_region_info.offset,
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s->config_region_info.size);
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assert(QEMU_IS_ALIGNED(s->config_region_info.offset + ofs, size));
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do {
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ret = pread(s->device, buf, size, s->config_region_info.offset + ofs);
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} while (ret == -1 && errno == EINTR);
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return ret == size ? 0 : -errno;
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}
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static int qemu_vfio_pci_write_config(QEMUVFIOState *s, void *buf, int size, int ofs)
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{
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int ret;
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trace_qemu_vfio_pci_write_config(buf, ofs, size,
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s->config_region_info.offset,
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s->config_region_info.size);
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assert(QEMU_IS_ALIGNED(s->config_region_info.offset + ofs, size));
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do {
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ret = pwrite(s->device, buf, size, s->config_region_info.offset + ofs);
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} while (ret == -1 && errno == EINTR);
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return ret == size ? 0 : -errno;
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}
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static void collect_usable_iova_ranges(QEMUVFIOState *s, void *buf)
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{
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struct vfio_iommu_type1_info *info = (struct vfio_iommu_type1_info *)buf;
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struct vfio_info_cap_header *cap = (void *)buf + info->cap_offset;
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struct vfio_iommu_type1_info_cap_iova_range *cap_iova_range;
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int i;
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while (cap->id != VFIO_IOMMU_TYPE1_INFO_CAP_IOVA_RANGE) {
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if (!cap->next) {
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return;
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}
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cap = (struct vfio_info_cap_header *)(buf + cap->next);
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}
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cap_iova_range = (struct vfio_iommu_type1_info_cap_iova_range *)cap;
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s->nb_iova_ranges = cap_iova_range->nr_iovas;
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if (s->nb_iova_ranges > 1) {
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s->usable_iova_ranges =
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g_realloc(s->usable_iova_ranges,
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s->nb_iova_ranges * sizeof(struct IOVARange));
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}
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for (i = 0; i < s->nb_iova_ranges; i++) {
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s->usable_iova_ranges[i].start = cap_iova_range->iova_ranges[i].start;
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s->usable_iova_ranges[i].end = cap_iova_range->iova_ranges[i].end;
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}
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}
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static int qemu_vfio_init_pci(QEMUVFIOState *s, const char *device,
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Error **errp)
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{
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int ret;
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int i;
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uint16_t pci_cmd;
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struct vfio_group_status group_status = { .argsz = sizeof(group_status) };
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struct vfio_iommu_type1_info *iommu_info = NULL;
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size_t iommu_info_size = sizeof(*iommu_info);
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struct vfio_device_info device_info = { .argsz = sizeof(device_info) };
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char *group_file = NULL;
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s->usable_iova_ranges = NULL;
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/* Create a new container */
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s->container = open("/dev/vfio/vfio", O_RDWR);
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if (s->container == -1) {
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error_setg_errno(errp, errno, "Failed to open /dev/vfio/vfio");
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return -errno;
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}
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if (ioctl(s->container, VFIO_GET_API_VERSION) != VFIO_API_VERSION) {
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error_setg(errp, "Invalid VFIO version");
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ret = -EINVAL;
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goto fail_container;
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}
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if (!ioctl(s->container, VFIO_CHECK_EXTENSION, VFIO_TYPE1_IOMMU)) {
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error_setg_errno(errp, errno, "VFIO IOMMU Type1 is not supported");
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ret = -EINVAL;
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goto fail_container;
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}
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/* Open the group */
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group_file = sysfs_find_group_file(device, errp);
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if (!group_file) {
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ret = -EINVAL;
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goto fail_container;
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}
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s->group = open(group_file, O_RDWR);
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if (s->group == -1) {
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error_setg_errno(errp, errno, "Failed to open VFIO group file: %s",
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group_file);
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g_free(group_file);
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ret = -errno;
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goto fail_container;
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}
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g_free(group_file);
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/* Test the group is viable and available */
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if (ioctl(s->group, VFIO_GROUP_GET_STATUS, &group_status)) {
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error_setg_errno(errp, errno, "Failed to get VFIO group status");
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ret = -errno;
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goto fail;
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}
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if (!(group_status.flags & VFIO_GROUP_FLAGS_VIABLE)) {
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error_setg(errp, "VFIO group is not viable");
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ret = -EINVAL;
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goto fail;
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}
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/* Add the group to the container */
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if (ioctl(s->group, VFIO_GROUP_SET_CONTAINER, &s->container)) {
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error_setg_errno(errp, errno, "Failed to add group to VFIO container");
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ret = -errno;
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goto fail;
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}
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/* Enable the IOMMU model we want */
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if (ioctl(s->container, VFIO_SET_IOMMU, VFIO_TYPE1_IOMMU)) {
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error_setg_errno(errp, errno, "Failed to set VFIO IOMMU type");
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ret = -errno;
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goto fail;
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}
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iommu_info = g_malloc0(iommu_info_size);
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iommu_info->argsz = iommu_info_size;
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/* Get additional IOMMU info */
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if (ioctl(s->container, VFIO_IOMMU_GET_INFO, iommu_info)) {
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error_setg_errno(errp, errno, "Failed to get IOMMU info");
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ret = -errno;
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goto fail;
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}
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/*
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* if the kernel does not report usable IOVA regions, choose
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* the legacy [QEMU_VFIO_IOVA_MIN, QEMU_VFIO_IOVA_MAX -1] region
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*/
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s->nb_iova_ranges = 1;
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s->usable_iova_ranges = g_new0(struct IOVARange, 1);
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s->usable_iova_ranges[0].start = QEMU_VFIO_IOVA_MIN;
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s->usable_iova_ranges[0].end = QEMU_VFIO_IOVA_MAX - 1;
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if (iommu_info->argsz > iommu_info_size) {
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iommu_info_size = iommu_info->argsz;
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iommu_info = g_realloc(iommu_info, iommu_info_size);
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if (ioctl(s->container, VFIO_IOMMU_GET_INFO, iommu_info)) {
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ret = -errno;
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goto fail;
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}
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collect_usable_iova_ranges(s, iommu_info);
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}
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s->device = ioctl(s->group, VFIO_GROUP_GET_DEVICE_FD, device);
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if (s->device < 0) {
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error_setg_errno(errp, errno, "Failed to get device fd");
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ret = -errno;
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goto fail;
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}
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/* Test and setup the device */
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if (ioctl(s->device, VFIO_DEVICE_GET_INFO, &device_info)) {
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error_setg_errno(errp, errno, "Failed to get device info");
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ret = -errno;
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goto fail;
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}
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|
|
if (device_info.num_regions < VFIO_PCI_CONFIG_REGION_INDEX) {
|
|
error_setg(errp, "Invalid device regions");
|
|
ret = -EINVAL;
|
|
goto fail;
|
|
}
|
|
|
|
s->config_region_info = (struct vfio_region_info) {
|
|
.index = VFIO_PCI_CONFIG_REGION_INDEX,
|
|
.argsz = sizeof(struct vfio_region_info),
|
|
};
|
|
if (ioctl(s->device, VFIO_DEVICE_GET_REGION_INFO, &s->config_region_info)) {
|
|
error_setg_errno(errp, errno, "Failed to get config region info");
|
|
ret = -errno;
|
|
goto fail;
|
|
}
|
|
trace_qemu_vfio_region_info("config", s->config_region_info.offset,
|
|
s->config_region_info.size,
|
|
s->config_region_info.cap_offset);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(s->bar_region_info); i++) {
|
|
ret = qemu_vfio_pci_init_bar(s, i, errp);
|
|
if (ret) {
|
|
goto fail;
|
|
}
|
|
}
|
|
|
|
/* Enable bus master */
|
|
ret = qemu_vfio_pci_read_config(s, &pci_cmd, sizeof(pci_cmd), PCI_COMMAND);
|
|
if (ret) {
|
|
goto fail;
|
|
}
|
|
pci_cmd |= PCI_COMMAND_MASTER;
|
|
ret = qemu_vfio_pci_write_config(s, &pci_cmd, sizeof(pci_cmd), PCI_COMMAND);
|
|
if (ret) {
|
|
goto fail;
|
|
}
|
|
g_free(iommu_info);
|
|
return 0;
|
|
fail:
|
|
g_free(s->usable_iova_ranges);
|
|
s->usable_iova_ranges = NULL;
|
|
s->nb_iova_ranges = 0;
|
|
g_free(iommu_info);
|
|
close(s->group);
|
|
fail_container:
|
|
close(s->container);
|
|
return ret;
|
|
}
|
|
|
|
static void qemu_vfio_ram_block_added(RAMBlockNotifier *n,
|
|
void *host, size_t size)
|
|
{
|
|
QEMUVFIOState *s = container_of(n, QEMUVFIOState, ram_notifier);
|
|
trace_qemu_vfio_ram_block_added(s, host, size);
|
|
qemu_vfio_dma_map(s, host, size, false, NULL);
|
|
}
|
|
|
|
static void qemu_vfio_ram_block_removed(RAMBlockNotifier *n,
|
|
void *host, size_t size)
|
|
{
|
|
QEMUVFIOState *s = container_of(n, QEMUVFIOState, ram_notifier);
|
|
if (host) {
|
|
trace_qemu_vfio_ram_block_removed(s, host, size);
|
|
qemu_vfio_dma_unmap(s, host);
|
|
}
|
|
}
|
|
|
|
static int qemu_vfio_init_ramblock(RAMBlock *rb, void *opaque)
|
|
{
|
|
void *host_addr = qemu_ram_get_host_addr(rb);
|
|
ram_addr_t length = qemu_ram_get_used_length(rb);
|
|
int ret;
|
|
QEMUVFIOState *s = opaque;
|
|
|
|
if (!host_addr) {
|
|
return 0;
|
|
}
|
|
ret = qemu_vfio_dma_map(s, host_addr, length, false, NULL);
|
|
if (ret) {
|
|
fprintf(stderr, "qemu_vfio_init_ramblock: failed %p %" PRId64 "\n",
|
|
host_addr, (uint64_t)length);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static void qemu_vfio_open_common(QEMUVFIOState *s)
|
|
{
|
|
qemu_mutex_init(&s->lock);
|
|
s->ram_notifier.ram_block_added = qemu_vfio_ram_block_added;
|
|
s->ram_notifier.ram_block_removed = qemu_vfio_ram_block_removed;
|
|
ram_block_notifier_add(&s->ram_notifier);
|
|
s->low_water_mark = QEMU_VFIO_IOVA_MIN;
|
|
s->high_water_mark = QEMU_VFIO_IOVA_MAX;
|
|
qemu_ram_foreach_block(qemu_vfio_init_ramblock, s);
|
|
}
|
|
|
|
/**
|
|
* Open a PCI device, e.g. "0000:00:01.0".
|
|
*/
|
|
QEMUVFIOState *qemu_vfio_open_pci(const char *device, Error **errp)
|
|
{
|
|
int r;
|
|
QEMUVFIOState *s = g_new0(QEMUVFIOState, 1);
|
|
|
|
/*
|
|
* VFIO may pin all memory inside mappings, resulting it in pinning
|
|
* all memory inside RAM blocks unconditionally.
|
|
*/
|
|
r = ram_block_discard_disable(true);
|
|
if (r) {
|
|
error_setg_errno(errp, -r, "Cannot set discarding of RAM broken");
|
|
g_free(s);
|
|
return NULL;
|
|
}
|
|
|
|
r = qemu_vfio_init_pci(s, device, errp);
|
|
if (r) {
|
|
ram_block_discard_disable(false);
|
|
g_free(s);
|
|
return NULL;
|
|
}
|
|
qemu_vfio_open_common(s);
|
|
return s;
|
|
}
|
|
|
|
static void qemu_vfio_dump_mappings(QEMUVFIOState *s)
|
|
{
|
|
for (int i = 0; i < s->nr_mappings; ++i) {
|
|
trace_qemu_vfio_dump_mapping(s->mappings[i].host,
|
|
s->mappings[i].iova,
|
|
s->mappings[i].size);
|
|
}
|
|
}
|
|
|
|
/**
|
|
* Find the mapping entry that contains [host, host + size) and set @index to
|
|
* the position. If no entry contains it, @index is the position _after_ which
|
|
* to insert the new mapping. IOW, it is the index of the largest element that
|
|
* is smaller than @host, or -1 if no entry is.
|
|
*/
|
|
static IOVAMapping *qemu_vfio_find_mapping(QEMUVFIOState *s, void *host,
|
|
int *index)
|
|
{
|
|
IOVAMapping *p = s->mappings;
|
|
IOVAMapping *q = p ? p + s->nr_mappings - 1 : NULL;
|
|
IOVAMapping *mid;
|
|
trace_qemu_vfio_find_mapping(s, host);
|
|
if (!p) {
|
|
*index = -1;
|
|
return NULL;
|
|
}
|
|
while (true) {
|
|
mid = p + (q - p) / 2;
|
|
if (mid == p) {
|
|
break;
|
|
}
|
|
if (mid->host > host) {
|
|
q = mid;
|
|
} else if (mid->host < host) {
|
|
p = mid;
|
|
} else {
|
|
break;
|
|
}
|
|
}
|
|
if (mid->host > host) {
|
|
mid--;
|
|
} else if (mid < &s->mappings[s->nr_mappings - 1]
|
|
&& (mid + 1)->host <= host) {
|
|
mid++;
|
|
}
|
|
*index = mid - &s->mappings[0];
|
|
if (mid >= &s->mappings[0] &&
|
|
mid->host <= host && mid->host + mid->size > host) {
|
|
assert(mid < &s->mappings[s->nr_mappings]);
|
|
return mid;
|
|
}
|
|
/* At this point *index + 1 is the right position to insert the new
|
|
* mapping.*/
|
|
return NULL;
|
|
}
|
|
|
|
/**
|
|
* Allocate IOVA and create a new mapping record and insert it in @s.
|
|
*/
|
|
static IOVAMapping *qemu_vfio_add_mapping(QEMUVFIOState *s,
|
|
void *host, size_t size,
|
|
int index, uint64_t iova)
|
|
{
|
|
int shift;
|
|
IOVAMapping m = {.host = host, .size = size, .iova = iova};
|
|
IOVAMapping *insert;
|
|
|
|
assert(QEMU_IS_ALIGNED(size, qemu_real_host_page_size));
|
|
assert(QEMU_IS_ALIGNED(s->low_water_mark, qemu_real_host_page_size));
|
|
assert(QEMU_IS_ALIGNED(s->high_water_mark, qemu_real_host_page_size));
|
|
trace_qemu_vfio_new_mapping(s, host, size, index, iova);
|
|
|
|
assert(index >= 0);
|
|
s->nr_mappings++;
|
|
s->mappings = g_renew(IOVAMapping, s->mappings, s->nr_mappings);
|
|
insert = &s->mappings[index];
|
|
shift = s->nr_mappings - index - 1;
|
|
if (shift) {
|
|
memmove(insert + 1, insert, shift * sizeof(s->mappings[0]));
|
|
}
|
|
*insert = m;
|
|
return insert;
|
|
}
|
|
|
|
/* Do the DMA mapping with VFIO. */
|
|
static int qemu_vfio_do_mapping(QEMUVFIOState *s, void *host, size_t size,
|
|
uint64_t iova)
|
|
{
|
|
struct vfio_iommu_type1_dma_map dma_map = {
|
|
.argsz = sizeof(dma_map),
|
|
.flags = VFIO_DMA_MAP_FLAG_READ | VFIO_DMA_MAP_FLAG_WRITE,
|
|
.iova = iova,
|
|
.vaddr = (uintptr_t)host,
|
|
.size = size,
|
|
};
|
|
trace_qemu_vfio_do_mapping(s, host, iova, size);
|
|
|
|
if (ioctl(s->container, VFIO_IOMMU_MAP_DMA, &dma_map)) {
|
|
error_report("VFIO_MAP_DMA failed: %s", strerror(errno));
|
|
return -errno;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* Undo the DMA mapping from @s with VFIO, and remove from mapping list.
|
|
*/
|
|
static void qemu_vfio_undo_mapping(QEMUVFIOState *s, IOVAMapping *mapping,
|
|
Error **errp)
|
|
{
|
|
int index;
|
|
struct vfio_iommu_type1_dma_unmap unmap = {
|
|
.argsz = sizeof(unmap),
|
|
.flags = 0,
|
|
.iova = mapping->iova,
|
|
.size = mapping->size,
|
|
};
|
|
|
|
index = mapping - s->mappings;
|
|
assert(mapping->size > 0);
|
|
assert(QEMU_IS_ALIGNED(mapping->size, qemu_real_host_page_size));
|
|
assert(index >= 0 && index < s->nr_mappings);
|
|
if (ioctl(s->container, VFIO_IOMMU_UNMAP_DMA, &unmap)) {
|
|
error_setg_errno(errp, errno, "VFIO_UNMAP_DMA failed");
|
|
}
|
|
memmove(mapping, &s->mappings[index + 1],
|
|
sizeof(s->mappings[0]) * (s->nr_mappings - index - 1));
|
|
s->nr_mappings--;
|
|
s->mappings = g_renew(IOVAMapping, s->mappings, s->nr_mappings);
|
|
}
|
|
|
|
/* Check if the mapping list is (ascending) ordered. */
|
|
static bool qemu_vfio_verify_mappings(QEMUVFIOState *s)
|
|
{
|
|
int i;
|
|
if (QEMU_VFIO_DEBUG) {
|
|
for (i = 0; i < s->nr_mappings - 1; ++i) {
|
|
if (!(s->mappings[i].host < s->mappings[i + 1].host)) {
|
|
fprintf(stderr, "item %d not sorted!\n", i);
|
|
qemu_vfio_dump_mappings(s);
|
|
return false;
|
|
}
|
|
if (!(s->mappings[i].host + s->mappings[i].size <=
|
|
s->mappings[i + 1].host)) {
|
|
fprintf(stderr, "item %d overlap with next!\n", i);
|
|
qemu_vfio_dump_mappings(s);
|
|
return false;
|
|
}
|
|
}
|
|
}
|
|
return true;
|
|
}
|
|
|
|
static int
|
|
qemu_vfio_find_fixed_iova(QEMUVFIOState *s, size_t size, uint64_t *iova)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < s->nb_iova_ranges; i++) {
|
|
if (s->usable_iova_ranges[i].end < s->low_water_mark) {
|
|
continue;
|
|
}
|
|
s->low_water_mark =
|
|
MAX(s->low_water_mark, s->usable_iova_ranges[i].start);
|
|
|
|
if (s->usable_iova_ranges[i].end - s->low_water_mark + 1 >= size ||
|
|
s->usable_iova_ranges[i].end - s->low_water_mark + 1 == 0) {
|
|
*iova = s->low_water_mark;
|
|
s->low_water_mark += size;
|
|
return 0;
|
|
}
|
|
}
|
|
return -ENOMEM;
|
|
}
|
|
|
|
static int
|
|
qemu_vfio_find_temp_iova(QEMUVFIOState *s, size_t size, uint64_t *iova)
|
|
{
|
|
int i;
|
|
|
|
for (i = s->nb_iova_ranges - 1; i >= 0; i--) {
|
|
if (s->usable_iova_ranges[i].start > s->high_water_mark) {
|
|
continue;
|
|
}
|
|
s->high_water_mark =
|
|
MIN(s->high_water_mark, s->usable_iova_ranges[i].end + 1);
|
|
|
|
if (s->high_water_mark - s->usable_iova_ranges[i].start + 1 >= size ||
|
|
s->high_water_mark - s->usable_iova_ranges[i].start + 1 == 0) {
|
|
*iova = s->high_water_mark - size;
|
|
s->high_water_mark = *iova;
|
|
return 0;
|
|
}
|
|
}
|
|
return -ENOMEM;
|
|
}
|
|
|
|
/* Map [host, host + size) area into a contiguous IOVA address space, and store
|
|
* the result in @iova if not NULL. The caller need to make sure the area is
|
|
* aligned to page size, and mustn't overlap with existing mapping areas (split
|
|
* mapping status within this area is not allowed).
|
|
*/
|
|
int qemu_vfio_dma_map(QEMUVFIOState *s, void *host, size_t size,
|
|
bool temporary, uint64_t *iova)
|
|
{
|
|
int ret = 0;
|
|
int index;
|
|
IOVAMapping *mapping;
|
|
uint64_t iova0;
|
|
|
|
assert(QEMU_PTR_IS_ALIGNED(host, qemu_real_host_page_size));
|
|
assert(QEMU_IS_ALIGNED(size, qemu_real_host_page_size));
|
|
trace_qemu_vfio_dma_map(s, host, size, temporary, iova);
|
|
qemu_mutex_lock(&s->lock);
|
|
mapping = qemu_vfio_find_mapping(s, host, &index);
|
|
if (mapping) {
|
|
iova0 = mapping->iova + ((uint8_t *)host - (uint8_t *)mapping->host);
|
|
} else {
|
|
if (s->high_water_mark - s->low_water_mark + 1 < size) {
|
|
ret = -ENOMEM;
|
|
goto out;
|
|
}
|
|
if (!temporary) {
|
|
if (qemu_vfio_find_fixed_iova(s, size, &iova0)) {
|
|
ret = -ENOMEM;
|
|
goto out;
|
|
}
|
|
|
|
mapping = qemu_vfio_add_mapping(s, host, size, index + 1, iova0);
|
|
if (!mapping) {
|
|
ret = -ENOMEM;
|
|
goto out;
|
|
}
|
|
assert(qemu_vfio_verify_mappings(s));
|
|
ret = qemu_vfio_do_mapping(s, host, size, iova0);
|
|
if (ret) {
|
|
qemu_vfio_undo_mapping(s, mapping, NULL);
|
|
goto out;
|
|
}
|
|
qemu_vfio_dump_mappings(s);
|
|
} else {
|
|
if (qemu_vfio_find_temp_iova(s, size, &iova0)) {
|
|
ret = -ENOMEM;
|
|
goto out;
|
|
}
|
|
ret = qemu_vfio_do_mapping(s, host, size, iova0);
|
|
if (ret) {
|
|
goto out;
|
|
}
|
|
}
|
|
}
|
|
trace_qemu_vfio_dma_mapped(s, host, iova0, size);
|
|
if (iova) {
|
|
*iova = iova0;
|
|
}
|
|
out:
|
|
qemu_mutex_unlock(&s->lock);
|
|
return ret;
|
|
}
|
|
|
|
/* Reset the high watermark and free all "temporary" mappings. */
|
|
int qemu_vfio_dma_reset_temporary(QEMUVFIOState *s)
|
|
{
|
|
struct vfio_iommu_type1_dma_unmap unmap = {
|
|
.argsz = sizeof(unmap),
|
|
.flags = 0,
|
|
.iova = s->high_water_mark,
|
|
.size = QEMU_VFIO_IOVA_MAX - s->high_water_mark,
|
|
};
|
|
trace_qemu_vfio_dma_reset_temporary(s);
|
|
QEMU_LOCK_GUARD(&s->lock);
|
|
if (ioctl(s->container, VFIO_IOMMU_UNMAP_DMA, &unmap)) {
|
|
error_report("VFIO_UNMAP_DMA failed: %s", strerror(errno));
|
|
return -errno;
|
|
}
|
|
s->high_water_mark = QEMU_VFIO_IOVA_MAX;
|
|
return 0;
|
|
}
|
|
|
|
/* Unmapping the whole area that was previously mapped with
|
|
* qemu_vfio_dma_map(). */
|
|
void qemu_vfio_dma_unmap(QEMUVFIOState *s, void *host)
|
|
{
|
|
int index = 0;
|
|
IOVAMapping *m;
|
|
|
|
if (!host) {
|
|
return;
|
|
}
|
|
|
|
trace_qemu_vfio_dma_unmap(s, host);
|
|
qemu_mutex_lock(&s->lock);
|
|
m = qemu_vfio_find_mapping(s, host, &index);
|
|
if (!m) {
|
|
goto out;
|
|
}
|
|
qemu_vfio_undo_mapping(s, m, NULL);
|
|
out:
|
|
qemu_mutex_unlock(&s->lock);
|
|
}
|
|
|
|
static void qemu_vfio_reset(QEMUVFIOState *s)
|
|
{
|
|
ioctl(s->device, VFIO_DEVICE_RESET);
|
|
}
|
|
|
|
/* Close and free the VFIO resources. */
|
|
void qemu_vfio_close(QEMUVFIOState *s)
|
|
{
|
|
int i;
|
|
|
|
if (!s) {
|
|
return;
|
|
}
|
|
for (i = 0; i < s->nr_mappings; ++i) {
|
|
qemu_vfio_undo_mapping(s, &s->mappings[i], NULL);
|
|
}
|
|
ram_block_notifier_remove(&s->ram_notifier);
|
|
g_free(s->usable_iova_ranges);
|
|
s->nb_iova_ranges = 0;
|
|
qemu_vfio_reset(s);
|
|
close(s->device);
|
|
close(s->group);
|
|
close(s->container);
|
|
ram_block_discard_disable(false);
|
|
}
|