Hervé Poussineau 54e755588c mips jazz: do not raise data bus exception when accessing invalid addresses ... MIPS Jazz chipset doesn't seem to raise data bus exceptions on invalid accesses. However, there is no easy way to prevent them. Creating a big memory region for the whole address space doesn't prevent memory core to directly call unassigned_mem_read/write which in turn call cpu->do_unassigned_access, which (for MIPS CPU) raise an data bus exception. This fixes a MIPS Jazz regression introduced in c658b94f6e. Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Message-id: 1383603977-7003-1-git-send-email-hpoussin@reactos.org Signed-off-by: Anthony Liguori <aliguori@amazon.com>		2013-11-21 07:55:54 -08:00
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addr.c	hw: move headers to include/	2013-04-08 18:13:10 +02:00
cputimer.c	aio / timers: Switch entire codebase to the new timer API	2013-08-22 19:14:24 +02:00
gt64xxx_pci.c	mips_malta: do not use isa_mmio	2013-07-25 08:12:27 -05:00
Makefile.objs	hw: move PCI bridges to hw/pci-* or hw/ARCH	2013-04-08 18:13:14 +02:00
mips_fulong2e.c	hw: Clean up bogus default boot order	2013-08-28 10:16:47 +03:00
mips_int.c	hw: move headers to include/	2013-04-08 18:13:10 +02:00
mips_jazz.c	mips jazz: do not raise data bus exception when accessing invalid addresses	2013-11-21 07:55:54 -08:00
mips_malta.c	mips_malta: support up to 2GiB RAM	2013-09-09 18:42:22 +02:00
mips_mipssim.c	mips_mipssim: Silence BIOS loading warning for qtest	2013-11-05 17:47:28 +01:00
mips_r4k.c	hw: Clean up bogus default boot order	2013-08-28 10:16:47 +03:00